Abstract: A nanopore-based sequencing chip can have a surface with an array of wells, with each well having a working electrode. Charge can be established within the wells by applying a voltage between the working electrodes and a counter electrode. The charge can then be trapped within the wells by sealing the wells with a membrane. The trapped charge can be used to facilitate pore insertion into the membranes.

Abstract: Systems and methods for inserting a single pore into a membrane are described herein. A stepped or ramped voltage waveform can be applied across the membranes of the cells of an array, where the voltage waveform starts at first voltage and increases in magnitude over a period of time to a second voltage. The first voltage is selected to be low enough to reduce the risk of damaging the membrane, while the rate of voltage increase is selected to provide sufficient time for the pores to insert into the membranes. Once a pore is inserted into the membrane, the voltage across the membrane rapidly drops, thereby reducing the risk of damaging the membrane even if the applied voltage between the electrodes is further increased.