Abstract: Techniques for fabricating thin epitaxial SiC device wafers are described. A bulk SiC wafer is used to provide a seed layer of a thin layer of SiC for epitaxially growing SiC. The seed layer is exfoliated from the bulk SiC after bonding the bulk SiC to a handle substrate. The bulk SiC wafer from which the thin layer of SiC is exfoliated may be re-used in fabricating subsequent thin film epitaxial SiC wafers. After growing epitaxial SiC from the seed layer on the handle substrate, devices may be fabricated in the epitaxial SiC and the handle substrate can be removed. The handle substrate can be re-used in fabricating subsequent thin film epitaxial SiC wafers. The epitaxial SiC can be cut into dies and packaged as an SiC chip or bonded to another substrate, such as a silicon substrate with devices formed thereon.

Abstract: Techniques for fabricating thin epitaxial SiC device wafers are described. A bulk SiC wafer is used to provide a seed layer of a thin layer of SiC for epitaxially growing SiC. The seed layer is exfoliated from the bulk SiC after bonding the bulk SiC to a handle substrate. The bulk SiC wafer from which the thin layer of SiC is exfoliated may be re-used in fabricating subsequent thin film epitaxial SiC wafers. After growing epitaxial SiC from the seed layer on the handle substrate, devices may be fabricated in the epitaxial SiC and the handle substrate can be removed. The handle substrate can be re-used in fabricating subsequent thin film epitaxial SiC wafers. The epitaxial SiC can be cut into dies and packaged as an SiC chip or bonded to another substrate, such as a silicon substrate with devices formed thereon.

Abstract: A multilayer wafer structure containing a silicon layer that contains at least one waveguide, an insulating layer and a layer that is lattice compatible with Group III-V compounds, with the lattice compatible layer in contact with one face of the insulating layer, and the face of the insulating layer opposite the lattice compatible layer is in contact with the silicon layer. The silicon and insulating layers contain either or both of at least one continuous cavity filled with materials such as to constitute a photodetector zone, or at least one continuous cavity filled with materials such as to constitute a light source zone.

Abstract: A method for manufacturing a SeOI substrate that includes a thin working layer made from one or more semiconductor material(s); a support layer; and a thin buried oxide layer between the working layer and the support layer. The method includes a manufacturing step of an intermediate SeOI substrate having a buried oxide layer with a thickness greater than a thickness desired for the thin buried oxide layer; and a dissolution step of the buried oxide layer in order to form therewith the thin buried oxide layer. After the dissolution step, an oxidation step of the substrate is conducted for creating an oxidized layer on the substrate, and an oxide migration step for diffusing at least a part of the oxide layer through the working layer in order to increase the electrical interface quality of the substrate and decrease its Dit value.

Abstract: A crystalline wafer comprising of a support substrate, a first layer and an interface layer. The first layer is of a first material in a relaxed state having a lattice parameter that is substantially equal to the nominal lattice parameter of the first material. The interface layer is in an at least partially molten state disposed between the support substrate and the first layer. The first material is preferably silicon germanium, and the interface layer includes germanium in a higher concentration than that of first material.

Abstract: A method for forming a device wafer with a recyclable support by providing a wafer having first and second surfaces, with at least the first surface of the wafer comprising a semiconductor material that is suitable for receiving or forming electronic devices thereon, providing a supporting substrate having upper and lower surfaces, and providing the second surface of the wafer or the upper surface of the supporting substrate with void features in an amount sufficient to enable a connecting bond therebetween to form a construct wherein the bond is formed at an interface between the wafer and the substrate and is suitable to maintain the wafer and supporting substrate in association while forming or applying electronic devices to the first surface of the wafer, but which connecting bond is severable at the interface due to the void features to separate the substrate from the wafer so that the substrate can be reused.

Abstract: A multilayer wafer structure containing a silicon layer that contains at least one waveguide, an insulating layer and a layer that is lattice compatible with Group III-V compounds, with the lattice compatible layer in contact with one face of the insulating layer, and the face of the insulating layer opposite the lattice compatible layer is in contact with the silicon layer. The silicon and insulating layers contain either or both of at least one continuous cavity filled with materials such as to constitute a photodetector zone, or at least one continuous cavity filled with materials such as to constitute a light source zone.

Abstract: A method for manufacturing a SeOI substrate that includes a thin working layer made from one or more semiconductor material(s); a support layer; and a thin buried oxide layer between the working layer and the support layer. The method includes a manufacturing step of an intermediate SeOI substrate having a buried oxide layer with a thickness greater than a thickness desired for the thin buried oxide layer; and a dissolution step of the buried oxide layer in order to form therewith the thin buried oxide layer. After the dissolution step, an oxidation step of the substrate is conducted for creating an oxidized layer on the substrate, and an oxide migration step for diffusing at least a part of the oxide layer through the working layer in order to increase the electrical interface quality of the substrate and decrease its Dit value.

Abstract: A method for forming a device wafer with a recyclable support by providing a wafer having first and second surfaces, with at least the first surface of the wafer comprising a semiconductor material that is suitable for receiving or forming electronic devices thereon, providing a supporting substrate having upper and lower surfaces, and providing the second surface of the wafer or the upper surface of the supporting substrate with void features in an amount sufficient to enable a connecting bond therebetween to form a construct wherein the bond is formed at an interface between the wafer and the substrate and is suitable to maintain the wafer and supporting substrate in association while forming or applying electronic devices to the first surface of the wafer, but which connecting bond is severable at the interface due to the void features to separate the substrate from the wafer so that the substrate can be reused.

Abstract: A method for making a crystalline wafer, in which an interface layer is associated with a support substrate. A first layer is associated with the interface layer in a strained state. The interface layer is melted sufficiently to substantially uncouple the first layer from the support substrate to relax the first layer from the strained to state to a relaxed state. The interface material is solidified with the first layer in the relaxed state to obtain a first wafer.

Abstract: A method of manufacturing a wafer using a support substrate of a crystalline material. On the surface of the support substrate, a layer of a diamond is grown to form a first wafer in combination with the support substrate. A further substrate is bonded to the surface of the diamond layer, and a region of weakness is formed within the first wafer or the further substrate. Energy is then applied at the region of weakness to detach the structure into a first portion and a second portion.

Abstract: A method for forming a device wafer with a recyclable support by providing a wafer having first and second surfaces, with at least the first surface of the wafer comprising a semiconductor material that is suitable for receiving or forming electronic devices thereon, providing a supporting substrate having upper and lower surfaces, and providing the second surface of the wafer or the upper surface of the supporting substrate with void features in an amount sufficient to enable a connecting bond therebetween to form a construct wherein the bond is formed at an interface between the wafer and the substrate and is suitable to maintain the wafer and supporting substrate in association while forming or applying electronic devices to the first surface of the wafer, but which connecting bond is severable at the interface due to the void features to separate the substrate from the wafer so that the substrate can be reused.

Abstract: A method for making a crystalline wafer, in which an interface layer is associated with a support substrate. A first layer is associated with the interface layer in a strained state. The interface layer is melted sufficiently to substantially uncouple the first layer from the support substrate to relax the first layer from the strained to state to a relaxed state. The interface material is solidified with the first layer in the relaxed state to obtain a first wafer.

Abstract: A method for forming a device wafer with a recyclable support by providing a wafer having first and second surfaces, with at least the first surface of the wafer comprising a semiconductor material that is suitable for receiving or forming electronic devices thereon, providing a supporting substrate having upper and lower surfaces, and providing the second surface of the wafer or the upper surface of the supporting substrate with void features in an amount sufficient to enable a connecting bond therebetween to form a construct wherein the bond is formed at an interface between the wafer and the substrate and is suitable to maintain the wafer and supporting substrate in association while forming or applying electronic devices to the first surface of the wafer, but which connecting bond is severable at the interface due to the void features to separate the substrate from the wafer so that the substrate can be reused.

Abstract: An integrated circuit comprising active and passive devices is formed in a thin slice of monocrystalline semiconductor bonded to a high resistivity polycrystalline silicon substrate. As compared with conventional integrated circuits supported on a monocrystalline substrate, circuits in monocrystalline films bonded to high resistivity polycrystalline substrates are less subject to parasitic capacitance, crosstalk and eddy currents. As compared with typical SOI wafers, the polycrystalline substrates have higher resistivity, and this resistivity is much less affected by contamination than it would be in monocrystalline substrates. Compared to silicon-on-sapphire or silicon on any other insulating material, the polycrystalline substrates are more compatible with the mechanical, thermal, and optical properties of the crystalline silicon layer.

Abstract: A method of making an x-ray mask intended to expose photoresist upon a layer which is to be etched to a nominal dimension, whereby effects such as global divergence, local divergence, and dose non-uniformity are compensated by adjusting the feature dimension in the mask. The compensation is achieved by varying the dose provided by an electron beam which is used to define the feature upon the x-ray mask or by adding or subtracting pixels during writing of the pattern with an electron beam. The dose is varied by changing the electron beam current or the rate at which the electron beam scans the field. The features are typically those encountered in the processing of a semiconductor wafer wherein the smallest dimension is 250 nm or less.

Abstract: The present invention provides a process for locally removing at least a portion of a material layer structure in which first and second materials are provided, the second material having a higher etch rate by an activated reaction gas than the first material. The second material is disposed over at least a portion of the first material. A reaction gas flows adjacent a portion of the second material to be removed. The reaction gas is chemically reactive with at least the second material to form volatile reaction products when activated by a focused particle beam, but does not spontaneously react with the second material.The portion of the second material to be removed is irradiated with a focused particle beam. Exemplary particle beams are focused ion beams and electron beams. The focused particle beam initiates a chemical reaction between the portion of the second material and the reaction gas, forming volatile reaction products which desorb from the substrate and are removed.

Abstract: A mask for X-ray lithography is produced by initially forming a thin layer of polycrystalline silicon on a silicon oxide containing substrate. A portion of the substrate at the periphery of the major surface opposite the silicon layer is masked. The exposed portion of the substrate is removed by an etchant that is selective for silicon oxide containing composition relative to silicon, e.g. aqueous HF. The resulting membrane of silicon on a peripheral region of silicon oxide containing compositions is in tensile stress as required for lithography, but is robust. Metal, X-ray absorbing patterns are formed on the silicon by standard lithographic procedures.

Abstract: In dielectrically isolated devices a buried conducting layer adjacent to the dielectric layer is produced by a drift effect. In particular, if arsenic antimony and/or phosphorus is present in the silicon dioxide layer, it is caused to drift from this layer and enter the adjacent isolated silicon region while maintaining a relatively narrow spatial configuration. Thus, a discrete buried highly conductive layer is formed. This configuration is particularly useful for transistor configurations such as utilized in switching applications.

Abstract: Dielectrically isolated devices are produced by a series of steps including the implantation of a silicon substrate to produce a precursor to the silicon oxide region and subsequently heat treating this region. In contrast to previous techniques, the extent of such heating is substantially increased to remove a non-oxidic intermediary region typically remaining.