Abstract: This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

Abstract: This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

Abstract: The present invention relates to curing of semiconductor wafers. More particularly, the invention relates to cure chambers containing multiple cure stations, each featuring one or more UV light sources. The wafers are cured by sequential exposure to the light sources in each station. In some embodiments, the wafers remain stationary with respect to the light source during exposure. In other embodiments, there is relative movement between the light source and the wafer during exposure. The invention also provides chambers that may be used to independently modulate the cross-linking, density and increase in stress of a cured material by providing independent control of the wafer temperature and UV intensity.

Abstract: This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

Abstract: The present disclosure presents a chemical vapor deposition reactor having improved chemical utilization and cost efficiency. The wafer susceptors of the present disclosure may be used in a stackable configuration for processing many wafers simultaneously. The reactors of the present disclosure may be reverse-flow depletion mode reactors, which tends to provide uniform film thickness and a high degree of chemical utilization.

Abstract: Mechanisms are disclosed by which a semiconductor wafer, silicon in some embodiments, is repeatedly used to serve as a template and carrier for fabricating high efficiency capable thin semiconductor solar cells substrates. Mechanisms that enable such repeated use of these templates at consistent quality and with high yield are disclosed.

Abstract: The present invention relates to curing of semiconductor wafers. More particularly, the invention relates to cure chambers containing multiple cure stations, each featuring one or more UV light sources. The wafers are cured by sequential exposure to the light sources in each station. In some embodiments, the wafers remain stationary with respect to the light source during exposure. In other embodiments, there is relative movement between the light source and the wafer during exposure. The invention also provides chambers that may be used to independently modulate the cross-linking, density and increase in stress of a cured material by providing independent control of the wafer temperature and UV intensity.

Abstract: Provided herein are assemblies that, when coupled to an object, are capable of keeping the object at a uniform elevated temperature while removing large amounts of heat from an external source. Applications include various integrated circuit fabrication processes that use such external sources to expose wafers to radiation. In certain embodiments, the assemblies include a pedestal for supporting the wafer or other object. In certain embodiments, the assemblies include a calibrated heat resistance that allows heat be conducted away from the pedestal and wafer to maintain the desired set-point temperature. In certain embodiments, the pedestal may have one or more protrusions used to dissipate or transfer heat from the pedestal to a heat sink. Also, in certain embodiments, the pedestal surface is configured to have a spectral reflectivity of desired values in such way as to reflect the wavelengths that are emitted by an external radiant heat source.

Abstract: The present invention provides a heat transfer assembly that, when coupled to an object, is capable of keeping the object at a uniform elevated temperature while removing large amounts of heat from an external source. The assembly may be contained in a pedestal for use in a UV-cure chamber. The heat transfer assembly includes a heating element to control the wafer temperature and a cooling element to remove incident IR heat from the wafer and pedestal. A heat resistant layer having a calibrated heat resistance is located between the heating and cooling elements and between the wafer and the cooling elements. The heat resistant layer is able to sustain high temperature gradient from the wafer to the coolant so that the coolant does not boil while permitting enough heat to be conducted away from the wafer to maintain the desired set-point temperature.

Abstract: Bowing of semiconductor wafers during heating is reduced by heating the wafers in a gas with a thermal conductivity and mean free path greater than that of oxygen, or by heating the wafers in a processing chamber under a pressure less than 0.1 Torr. In one embodiment, the high thermal conductivity gas is helium and heating in the helium takes place at a pressure less than 2.4 Torr.

Abstract: What is disclosed is an injector of the type commonly used in atmospheric pressure chemical vapor deposition equipment. The injector includes a number of plates with a number of linear hole arrays. The plates are layered in order to produce a number of cascaded holes arrays. The layered plates define a hole matrix. A chute is positioned beneath the hole matrix. On both sides of the chute is a cooling plate. The chute includes a passage, the regions between the cooling plate and the chute form ducts. The top of the hole matrix receives a number of gases and discretely conveys them to the top of the individual cascaded hole arrays. The gaseous chemicals are then forced through the cascaded hole arrays which induces the gases to flow in an increasingly uniform manner. The gases are then individually fed to the passage and ducts which convey them to a region above the surface where the gases are exposed to one another, react and form a layer on the surface.