Abstract: A semiconductor device test socket is disclosed which includes one or more flexible replaceable shielded solderless multiple contact assemblies. The multiple contact assemblies provide electrical communication between a semiconductor device under test and a semiconductor device test circuit. The semiconductor device has a plurality of accessible terminals contacted by the multiple contact assemblies and is held in an insulating device carrier which also serves to protect the device terminals from damage during insertion of the device into the test socket. The carrier is secured in a test socket base by a releasable latch for testing over a period of time and/or in controlled environments.

Abstract: A semiconductor device test socket is disclosed which includes one or more flexible replaceable shielded solderless multiple contact assemblies. The multiple contact assemblies provide electrical communication between a semiconductor device under test and a semiconductor device test circuit. The semiconductor device has a plurality of accessible terminals contacted by the multiple contact assemblies and is held in an insulating device carrier which also serves to protect the device terminals from damage during insertion of the device into the test socket. The carrier is secured in a test socket base by a releasable latch for testing over a period of time and/or in controlled environments.

Abstract: A test probe ring for semiconductor devices is disclosed which contains a ground plane layer, an insulating layer and a layer of electrically separate conductors. A centrally located opening in the layered assembly has a plurality of layered fingers carrying the inner ends of the conductors. A pattern of contact bumps on the free ends of the fingers provides a co-planar pattern of conductor contacts which match a pattern of semiconductor device test pads. The fingers and contacts are formed by cutting kerfs between the conductors at the periphery of the centrally located opening.

Abstract: A test probe ring for semiconductor devices is disclosed which contains a ground plane layer, an insulating layer and a layer of electrically separate conductors. A centrally located opening in the layered assembly has a plurality of layered fingers carrying the inner ends of the conductors. A pattern of contact bumps on the free ends of the fingers provides a co-planar pattern of conductor contacts which match a pattern of semiconductor device test pads. The fingers and contacts are formed by cutting kerfs between the conductors at the periphery of the centrally located opening.

Abstract: A chuck for holding semiconductor wafers during testing of circuits formed thereon has a flat mounting surface with dual electrically isolated Kelvin contacts on the surface and passages communicating between the surface and a vacuum manifold for securing the wafers on the chuck with air pressure.