Abstract: Apparatus adapted for exascale computers are disclosed. The apparatus includes, but is not limited to at least one of: a system, data processor chip (DPC), Landing module (LM), chips including LM, anticipator chips, simultaneous multi-processor (SMP) cores, SMP channel (SMPC) cores, channels, bundles of channels, printed circuit boards (PCB) including bundles, floating point adders, accumulation managers, QUAD Link Anticipating Memory (QUADLAM), communication networks extended by coupling links of QUADLAM, log2 calculators, exp2 calculators, logALU, Non-Linear Accelerator (NLA), and stairways. Methods of algorithm and program development, verification and debugging are also disclosed. Collectively, embodiments of these elements disclose a class of supercomputers that obsolete Amdahl's Law, providing cabinets of petaflop performance and systems that may meet or exceed an exaflop of performance for Block LU Decomposition (Linpack).

Abstract: A system and method include measuring input electric current that is input into an electrically controlled valve to change a position of the valve. Output electric current that is output from the valve in response to the input electric current being input into the electrically controlled valve is measured. Position signals are generated using a sensor coupled with the electrically controlled valve that are indicative of the position of the valve. Baseline values associated with the input electric current, the output electric current, and the position signals are calculated. A health state of the valve is determined by comparing the baseline values associated with the input electric current, the output electric current, and the position signals with subsequently measured values associated with the input electric current, the output electric current, and the position signals.

Abstract: Apparatus adapted for exascale computers are disclosed. The apparatus includes, but is not limited to at least one of: a system, data processor chip (DPC), Landing module (LM), chips including LM, anticipator chips, simultaneous multi-processor (SMP) cores, SMP channel (SMPC) cores, channels, bundles of channels, printed circuit boards (PCB) including bundles, floating point adders, accumulation managers, QUAD Link Anticipating Memory (QUADLAM), communication networks extended by coupling links of QUADLAM, log 2 calculators, exp2 calculators, log ALU, Non-Linear Accelerator (NLA), and stairways. Methods of algorithm and program development, verification and debugging are also disclosed. Collectively, embodiments of these elements disclose a class of supercomputers that obsolete Amdahl's Law, providing cabinets of petaflop performance and systems that may meet or exceed an exaflop of performance for Block LU Decomposition (Linpack).

Abstract: A system may include at least one engine bank including a plurality of fuel injectors. At least one exhaust temperature sensor is coupled to the engine bank(s). The exhaust temperature sensor(s) is configured to output at least one temperature signal regarding an exhaust temperature of the engine bank(s). A traction system is configured to output at least one electrical signal related to a power output of a vehicle. A control unit is coupled to the exhaust temperature sensor(s) and the traction system. The control unit is configured to receive the temperature signal(s) and the electrical signal(s). The control unit is configured to determine a mechanical and electrical health of the plurality of the fuel injectors by determining a temperature differential value of the temperature signal(s) and a power differential value related to the electrical signal(s), and analyzing a combination of the temperature differential value and the power differential value.

Abstract: Apparatus adapted for exascale computers are disclosed. The apparatus includes, but is not limited to at least one of: a system, data processor chip (DPC), Landing module (LM), chips including LM, anticipator chips, simultaneous multi-processor (SMP) cores, SMP channel (SMPC) cores, channels, bundles of channels, printed circuit boards (PCB) including bundles, floating point adders, accumulation managers, QUAD Link Anticipating Memory (QUADLAM), communication networks extended by coupling links of QUADLAM, log 2 calculators, exp2 calculators, log ALU, Non-Linear Accelerator (NLA), and stairways. Methods of algorithm and program development, verification and debugging are also disclosed. Collectively, embodiments of these elements disclose a class of supercomputers that obsolete Amdahl's Law, providing cabinets of petaflop performance and systems that may meet or exceed an exaflop of performance for Block LU Decomposition (Linpack).

Abstract: Apparatus adapted for exascale computers are disclosed. The apparatus includes, but is not limited to at least one of: a system, data processor chip (DPC), Landing module (LM), chips including LM, anticipator chips, simultaneous multi-processor (SMP) cores, SMP channel (SMPC) cores, channels, bundles of channels, printed circuit boards (PCB) including bundles, floating point adders, accumulation managers, QUAD Link Anticipating Memory (QUADLAM), communication networks extended by coupling links of QUADLAM, log 2 calculators, exp2 calculators, log ALU, Non-Linear Accelerator (NLA), and stairways. Methods of algorithm and program development, verification and debugging are also disclosed. Collectively, embodiments of these elements disclose a class of supercomputers that obsolete Amdahl's Law, providing cabinets of petaflop performance and systems that may meet or exceed an exaflop of performance for Block LU Decomposition (Linpack).

Abstract: A system may include at least one engine bank including a plurality of fuel injectors. At least one exhaust temperature sensor is coupled to the engine bank(s). The exhaust temperature sensor(s) is configured to output at least one temperature signal regarding an exhaust temperature of the engine bank(s). A traction system is configured to output at least one electrical signal related to a power output of a vehicle. A control unit is coupled to the exhaust temperature sensor(s) and the traction system. The control unit is configured to receive the temperature signal(s) and the electrical signal(s). The control unit is configured to determine a mechanical and electrical health of the plurality of the fuel injectors by determining a temperature differential value of the temperature signal(s) and a power differential value related to the electrical signal(s), and analyzing a combination of the temperature differential value and the power differential value.

Abstract: A family of computers is disclosed and claimed that supports simultaneous processes from the single core up to multi-chip Program Execution Systems (PES). The instruction processing of the instructed resources is local, dispensing with the need for large VLIW memories. The cores through the PES have maximum performance for Amdahl-compliant algorithms like matrix inversion, because the multiplications do not stall and the other circuitry keeps up. Cores with log based multiplication generators improve this performance by a factor of two for sine and cosine calculations in single precision floating point and have even greater performance for loge and ex calculations. Apparatus specifying, simulating, and/or layouts of the computer (components) are disclosed. Apparatus the computer and/or its components are disclosed.

Abstract: Apparatus adapted for exascale computers are disclosed. The apparatus includes, but is not limited to at least one of: a system, data processor chip (DPC), Landing module (LM), chips including LM, anticipator chips, simultaneous multi-processor (SMP) cores, SMP channel (SMPC) cores, channels, bundles of channels, printed circuit boards (PCB) including bundles, floating point adders, accumulation managers, QUAD Link Anticipating Memory (QUADLAM), communication networks extended by coupling links of QUADLAM, log 2 calculators, exp2 calculators, log ALU, Non-Linear Accelerator (NLA), and stairways. Methods of algorithm and program development, verification and debugging are also disclosed. Collectively, embodiments of these elements disclose a class of supercomputers that obsolete Amdahl's Law, providing cabinets of petaflop performance and systems that may meet or exceed an exaflop of performance for Block LU Decomposition (Linpack).

Abstract: Various methods and systems are provided for diagnosing a condition of a component in an exhaust gas recirculation system. In one example, a method includes selectively routing exhaust from a first subset of engine cylinders to an exhaust passage via a first valve and to an intake passage via a second valve and determining a respective condition of each of the first valve and second valve based on a first exhaust pressure of the first subset of engine cylinders and a second exhaust pressure of a second subset of engine cylinders.

Abstract: Various methods and systems are provided for diagnosing a condition of a component in an exhaust gas recirculation system. In one example, a method includes selectively routing exhaust from a first subset of engine cylinders to an exhaust passage via a first valve and to an intake passage via a second valve and determining a respective condition of each of the first valve and second valve based on a first exhaust pressure of the first subset of engine cylinders and a second exhaust pressure of a second subset of engine cylinders.

Abstract: A family of computers is disclosed and claimed that supports simultaneous processes from the single core up to multi-chip Program Execution Systems (PES). The instruction processing of the instructed resources is local, dispensing with the need for large VLIW memories. The cores through the PES have maximum performance for Amdahl-compliant algorithms like matrix inversion, because the multiplications do not stall and the other circuitry keeps up. Cores with log based multiplication generators improve this performance by a factor of two for sine and cosine calculations in single precision floating point and have even greater performance for loge and ex calculations. Apparatus specifying, simulating, and/or layouts of the computer (components) are disclosed. Apparatus the computer and/or its components are disclosed.

Abstract: A family of computers is disclosed and claimed that supports simultaneous processes from the single core up to multi-chip Program Execution Systems (PES). The instruction processing of the instructed resources is local, dispensing with the need for large VLIW memories. The cores through the PES have maximum performance for Amdahl-compliant algorithms like matrix inversion, because the multiplications do not stall and the other circuitry keeps up. Cores with log based multiplication generators improve this performance by a factor of two for sine and cosine calculations in single precision floating point and have even greater performance for loge and ex calculations. Apparatus specifying, simulating, and/or layouts of the computer (components) are disclosed. Apparatus the computer and/or its components are disclosed.

Abstract: Presently disclosed are methods and systems for diagnosing a coolant leak of an engine. A method may include diagnosing a coolant leak of an engine based on identified fill signatures of a measured engine coolant pressure. A vehicle system is also disclosed, including an engine, a coolant system operatively connected to the engine, a coolant pressure sensor configured to measure engine coolant pressure during operation of the engine, and a controller, including instructions configured to create a coolant pressure profile corresponding to a given engine speed, and diagnose a condition of the engine based on the coolant pressure profile.

Abstract: Systems and methods for diagnosing or prognosing mobile and/or fixed client assets in a logical and interactive manner. Embodiments of the present invention provide a data analyzer with one or more asset diagnostic models. An asset diagnostic model is configured to logically and systematically interact with a client asset and analyze operational parameter data obtained from the client asset to diagnose a problem with the client asset and/or to predict or forecast future problems or conditions of the client asset.

Abstract: Presently disclosed are methods and systems for diagnosing a coolant leak of an engine. A method may include diagnosing a coolant leak of an engine based on identified fill signatures of a measured engine coolant pressure. A vehicle system is also disclosed, including an engine, a coolant system operatively connected to the engine, a coolant pressure sensor configured to measure engine coolant pressure during operation of the engine, and a controller, including instructions configured to create a coolant pressure profile corresponding to a given engine speed, and diagnose a condition of the engine based on the coolant pressure profile.

Abstract: A family of computers is disclosed and claimed that supports simultaneous processes from the single core up to multi-chip Program Execution Systems (PES). The instruction processing of the instructed resources is local, dispensing with the need for large VLIW memories. The cores through the PES have maximum performance for Amdahl-compliant algorithms like matrix inversion, because the multiplications do not stall and the other circuitry keeps up. Cores with log based multiplication generators improve this performance by a factor of two for sine and cosine calculations in single precision floating point and have even greater performance for loge and ex calculations. Apparatus specifying, simulating, and/or layouts of the computer (components) are disclosed. Apparatus the computer and/or its components are disclosed.

Abstract: A floating point (FP) shifter for use with FP adders providing a shifted FP operand as a power of the exponent base (usually two) multiplied by a FP operand. First arithmetic processor using at least one FP shifter with FP adder. FP adder for N FP operands creating FP result, where N is at least three. Second arithmetic processor including at least one FP adder for N operands. Descriptions of FP shifter and FP adder for implementing their operational methods. Implementations of FP shifter and FP adder.

Abstract: A method and apparatus receiving number and using instruction to create resulting number approximating one of square root, reciprocal, or reciprocal square root of number. The resulting number as a product of that process. Using resulting number in a graphics accelerator. Apparatus preferably includes log-calculator, log-arithmetic-unit, and exponential-calculator. At least one of log-calculator and exponential-calculator include implementation non-linear calculator. The non-linear calculators may use at least one of mid-band-filter, outlier-removal-circuit. The invention includes making arithmetic circuit, log-calculator, log-arithmetic-unit and exponential-calculator. The arithmetic circuit, log-calculator, log-arithmetic-unit and exponential-calculator as products of manufacture. The arithmetic circuit may further include at least one of a floating-point-to-log-converter and/or a second of log-calculators.

Abstract: The present invention enables asynchronous circuits to be tested in the same manner and using the same equipment and test strategies as with synchronous circuits. The feedback path of an asynchronous element, for example a Muller C element, includes a test structure which may be invoked for the purpose of providing the means for synchronous testing. When configured for testing, the test structure provides a clocked latching and selecting function which, by virtue of breaking the feedback path of the self-timing device, prevents the device being tested from switching states until desired. When the element is not in test mode, the test structure is configured to pass through the data that normally flows through the feedback path unchanged. The result is an ability to test an asynchronous device or subsystem of a device in the same manner as and/or intermixed with a synchronous device.