Patents by Inventor George Michael Uhler

George Michael Uhler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MEMORY APPLIANCE COUPLINGS AND OPERATIONS
    Publication number: 20220188249
    Abstract: System and method for improved transferring of data involving memory device systems. A memory appliance (MA) comprising a plurality of memory modules is configured to store data within the plurality of memory modules and further configured to receive data commands from the first server and a second server coupled to the MA. The data commands may include direction memory access commands such that the MA can service the data commands while bypassing a host controller of the MA.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 16, 2022
    Inventors: Vlad Fruchter, Keith Lowery, George Michael Uhler, Steven Woo, Chi-Ming (Philip) Yeung, Ronald Lee
  • Memory appliance couplings and operations
    Patent number: 11210240
    Abstract: System and method for improved transferring of data involving memory device systems. A memory appliance (MA) comprising a plurality of memory modules is configured to store data within the plurality of memory modules and further configured to receive data commands from the first server and a second server coupled to the MA. The data commands may include direction memory access commands such that the MA can service the data commands while bypassing a host controller of the MA.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: December 28, 2021
    Assignee: Rambus Inc.
    Inventors: Vlad Fruchter, Keith Lowery, George Michael Uhler, Steven Woo, Chi-Ming (Philip) Yeung, Ronald Lee
  • MEMORY APPLIANCE COUPLINGS AND OPERATIONS
    Publication number: 20200110715
    Abstract: System and method for improved transferring of data involving memory device systems. A memory appliance (MA) comprising a plurality of memory modules is configured to store data within the plurality of memory modules and further configured to receive data commands from the first server and a second server coupled to the MA. The data commands may include direction memory access commands such that the MA can service the data commands while bypassing a host controller of the MA.
    Type: Application
    Filed: October 7, 2019
    Publication date: April 9, 2020
    Inventors: Vlad FRUCHTER, Keith LOWERY, George Michael UHLER, Steven WOO, Chi-Ming (Philip) YEUNG, Ronald LEE
  • Memory appliance couplings and operations
    Patent number: 10437747
    Abstract: System and method for improved transferring of data involving memory device systems. A memory appliance (MA) comprising a plurality of memory modules is configured to store data within the plurality of memory modules and further configured to receive data commands from first server and a second server coupled to the MA. The data commands may include direction memory access commands such that the MA can service the data commands while bypassing a host controller of the MA.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: October 8, 2019
    Assignee: Rambus Inc.
    Inventors: Vlad Fruchter, Keith Lowery, George Michael Uhler, Steven Woo, Chi-Ming (Philip) Yeung, Ronald Lee
  • Tracing out-of order load data
    Patent number: 7168066
    Abstract: A system and method for program counter and data tracing is disclosed. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: January 23, 2007
    Assignee: MIPS Technologies, Inc.
    Inventors: Radhika Thekkath, George Michael Uhler, Franz Treue, Lawrence Henry Hudepohl, Darren Miller Jones
  • Program counter and data tracing from a multi-issue processor
    Patent number: 7124072
    Abstract: A system and method for program counter and data tracing is disclosed. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: October 17, 2006
    Assignee: MIPS Technologies, Inc.
    Inventors: Radhika Thekkath, George Michael Uhler, Franz Treue, Lawrence Henry Hudepohl, Vidya Rajagopalan
  • Trace control block implementation and method
    Patent number: 7055070
    Abstract: A system and method for program counter and data tracing is disclosed. A trace interface is provided for communication of trace information between a processor core and a trace control block. The trace interface enables various combinations of processor cores and trace control blocks to be implemented.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: May 30, 2006
    Assignee: MIPS Technologies, Inc.
    Inventors: George Michael Uhler, Radhika Thekkath