Abstract: A heterojunction bipolar transistor is integrated on radio frequency (RF) dies of different sizes. The heterojunction bipolar transistor includes an emitter on a first-side of a semiconductor-on-insulator (SOI) layer of an SOI substrate. The emitter is accessed from the first-side while a collector is accessed from a second-side of the SOI substrate. One or more portions of a base of the heterojunction bipolar transistor is between the emitter and one or more portions of the collector. The heterojunction bipolar transistor also includes a compound semiconductor layer between the collector and the emitter. The compound semiconductor layer carries a charge between the emitter and the collector.

Abstract: A CMOS process is disclosed for manufacturing an integrated circuit including both MOSFETS and GaN HEMT devices. Each GaN HEMT device resides within an oxidized window that exposes a silicon substrate having a <111> crystal lattice orientation.

Abstract: A radio frequency integrated circuit (RFIC) includes multi-finger transistors including discrete diffusion regions and interconnected within a reconfigured form factor as a single switch transistor. The RFIC also includes a source bus having a first plurality of source fingers coupled to each source region of the multi-finger transistors and a second plurality of source fingers orthogonally coupled to the first plurality of source fingers. The second plurality of source fingers couple the discrete diffusion regions in parallel. The RFIC also includes a drain bus having a first plurality of drain fingers coupled to each drain region of the multi-finger transistors and a second plurality of drain fingers orthogonally coupled to the first plurality of drain fingers. The second plurality of drain fingers electrically couple the discrete diffusion regions in parallel. The RFIC further includes a plurality of interconnected body contacts to bias a body of each of the multi-finger transistors.

Abstract: An integrated circuit is described. The integrated circuit includes a metal oxide semiconductor field effect transistor (MOSFET). The MOSFET is on a first surface of an insulator layer of the integrated circuit. The MOSFET including a source region, a drain region, and a front gate. The MOSFET also includes an extended drain region between the drain region and a well proximate the front gate. The integrated circuit also includes back gates on a second surface opposite the first surface of the insulator layer. The back gates are overlapped by the extended drain region.

Abstract: In certain aspects, an apparatus comprises an SOI MOSFET having a diffusion region as a source or a drain on a back insulating layer, wherein the diffusion region has a front diffusion side and a back diffusion side opposite to the front diffusion side; a silicide layer on the front diffusion side having a back silicide side facing the diffusion region and a front silicide side opposite to the back silicide side; and a backside contact connected to the silicide layer, wherein at least a portion of the backside contact is in the back insulating layer.

Abstract: A radio frequency integrated circuit (RFIC) includes a bulk semiconductor die. The RFIC also includes a first active/passive device on a first-side of the bulk semiconductor die, and a first deep trench isolation region extending from the first-side to a second-side opposite the first-side of the bulk semiconductor die. The RFIC also includes a contact layer on the second-side of the bulk semiconductor die. The RFIC further includes a second-side dielectric layer on the contact layer. The first deep trench isolation region may extend through the contact layer and into the second-side dielectric layer.

Abstract: In certain aspects, an apparatus comprises an SOI MOSFET having a diffusion region as a source or a drain on a back insulating layer, wherein the diffusion region has a front diffusion side and a back diffusion side opposite to the front diffusion side; a silicide layer on the front diffusion side having a back silicide side facing the diffusion region and a front silicide side opposite to the back silicide side; and a backside contact connected to the silicide layer, wherein at least a portion of the backside contact is in the back insulating layer.

Abstract: An integrated circuit is described. The integrated circuit includes a metal oxide semiconductor field effect transistor (MOSFET). The MOSFET is on a first surface of an insulator layer of the integrated circuit. The MOSFET including a source region, a drain region, and a front gate. The MOSFET also includes an extended drain region between the drain region and a well proximate the front gate. The integrated circuit also includes back gates on a second surface opposite the first surface of the insulator layer. The back gates are overlapped by the extended drain region.

Abstract: A heterojunction bipolar transistor is integrated on radio frequency (RF) dies of different sizes. The heterojunction bipolar transistor includes an emitter on a first-side of a semiconductor-on-insulator (SOI) layer of an SOI substrate. The emitter is accessed from the first-side while a collector is accessed from a second-side of the SOI substrate. One or more portions of a base of the heterojunction bipolar transistor is between the emitter and one or more portions of the collector. The heterojunction bipolar transistor also includes a compound semiconductor layer between the collector and the emitter. The compound semiconductor layer carries a charge between the emitter and the collector.

Abstract: In certain aspects, an apparatus comprises an SOI MOSFET having a diffusion region as a source or a drain on a back insulating layer, wherein the diffusion region has a front diffusion side and a back diffusion side opposite to the front diffusion side; a silicide layer on the front diffusion side having a back silicide side facing the diffusion region and a front silicide side opposite to the back silicide side; and a backside contact connected to the silicide layer, wherein at least a portion of the backside contact is in the back insulating layer.

Abstract: A radio frequency integrated circuit switch includes a semiconductor die with a transistor having a gate on a first-side (e.g., front-side) of the semiconductor die. The semiconductor die may include a bulk semiconductor substrate or wafer (e.g., silicon substrate or wafer). The semiconductor die may also include a first deep trench isolation (DTI) region that extends from the front-side to a backside opposite the front-side of the semiconductor die. The radio frequency integrated circuit switch further includes a body contact layer on the backside of the semiconductor die. The body contact layer is coupled to a backside of a body of the transistor. The body of the transistor may have a first P-type region (e.g., a P+ region).

Abstract: A method of constructing a layer transferred radio frequency (RF) filter-on-insulator wafer includes exposing a front-side of a bulk RF wafer to a laser light source to form a modified layer at a predetermined depth along a horizontal length of the bulk RF wafer. The method also includes bonding the front-side of the bulk RF wafer to a front-side of a semiconductor handle wafer through an insulator layer. The method further includes forming an RF filter layer from the bulk RF wafer. The method also includes selectively etching away the modified layer from the RF filter layer to the predetermined depth to complete the layer transferred RF filter-on-insulator wafer.

Abstract: An integrated circuit is described. The integrated circuit includes a laterally diffused metal oxide semiconductor (LDMOS) transistor. The LDMOS is on a first surface of an insulator layer of the integrated circuit. The LDMOS transistor includes a source region, a drain region, and a gate. The LDMOS transistor also includes a secondary well between the drain region and the gate. The secondary well has an opposite polarity from the drain region. The LDMOS transistor further includes a backside device on a second surface opposite the first surface of the insulator layer.

Abstract: A radio frequency integrated circuit (RFIC) includes multi-finger transistors including discrete diffusion regions and interconnected within a reconfigured form factor as a single switch transistor. The RFIC also includes a source bus having a first plurality of source fingers coupled to each source region of the multi-finger transistors and a second plurality of source fingers orthogonally coupled to the first plurality of source fingers. The second plurality of source fingers couple the discrete diffusion regions in parallel. The RFIC also includes a drain bus having a first plurality of drain fingers coupled to each drain region of the multi-finger transistors and a second plurality of drain fingers orthogonally coupled to the first plurality of drain fingers. The second plurality of drain fingers electrically couple the discrete diffusion regions in parallel. The RFIC further includes a plurality of interconnected body contacts to bias a body of each of the multi-finger transistors.

Abstract: A radio frequency integrated circuit (RFIC) includes a bulk semiconductor die. The RFIC also includes a first active/passive device on a first-side of the bulk semiconductor die, and a first deep trench isolation region extending from the first-side to a second-side opposite the first-side of the bulk semiconductor die. The RFIC also includes a contact layer on the second-side of the bulk semiconductor die. The RFIC further includes a second-side dielectric layer on the contact layer. The first deep trench isolation region may extend through the contact layer and into the second-side dielectric layer.