Abstract: A memory storage scheme permitting storage of characters in one of several orientations in response to selected applied addresses, including a plurality of random access memory (RAM) chips organized into RAM SETS, each set including N.sub.B devices where N.sub.B equals the number of bits in a character, each device being organized as N.sub.R +1 bits where N.sub.R is the number of bits stored in each device; each RAM SET describing R adjacent rows of bit map, each row containing KN.sub.B +1 bits.

Abstract: A sensor is compensated through the use of a closed loop comprising a digital processor, a digital-to-analog converter and a comparator having inputs coupled to the converter and the sensor and an output fed back to the digital processor. During calibration of the sensor, a signal from the sensor is tracked by the digital processor and at least one of the values characteristic of the sensor signal is stored in the digital processor. The stored value is used as or in the computation of a reference by the digital processor which is compared with the sensor signal during operation of the sensor to appropriately compensate the sensor for gain, offset, drift or degradation in the quality of the sensor signal.

Abstract: Linear and rotary stepper motors are provided with predetermined stop positions which differ from the magnetically inherent stepped positions of the stepper motors. The predetermined stop positions result from sensing the distance the rotor or slider is from a predetermined stop position and generating a signal including a position component representing the distance to the stop position and a velocity component representing the velocity at which the stop position is being approached. The signal is in turn utilized to generate a current reference signal for the motor which is compared with the current of the motor so as to stop the motor at the predetermined stop position.