Patents by Inventor George S. Leach, Jr.

George S. Leach, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4206370
    Abstract: A charge coupled device (CCD) register includes a first group of CCD cells coupled horizontally together. Each of the CCD cells includes a "first phase location" and a "second phase location". The register includes a plurality of CCD loops, each of the CCD loops beginning at the first phase location of a respective one of the CCD cells and ending at the second phase location of the same CCD cell. Each of the CCD loops includes the same number of sequentially coupled CCD cells. The CCD register has a very high density of CCD cells, and requires far fewer regeneration devices than a serial CCD register with the same number of CCD cells.
    Type: Grant
    Filed: May 30, 1978
    Date of Patent: June 3, 1980
    Assignee: Motorola, Inc.
    Inventor: George S. Leach, Jr.
  • Patent number: 4065678
    Abstract: A clamped push-pull driver circuit suitable for driving high capacitive loads includes a bootstrap MOS inverter circuit driving an MOS push-pull driver circuit. A regulator circuit including a plurality of diode-connected MOSFETs is coupled between the output of the MOS bootstrap inverter and a ground conductor. A MOSFET (the feedback device) having its gate electrode coupled to the output of the MOS push-pull circuit is connected in series with the diode-connected MOSFETs. Rapid rise time and short delay are achieved at the output of the clamped push-pull driver circuit, since the regulator circuit does not begin to conduct current (i.e., does not start the clamping action) until the output voltage of the push-pull driver circuit has exceeded two thresholds. Thus a large drive capability is provided to initiate the rising action of the output signal and clamping only begins to occur after the output is already rising towards a higher virtual final level than that which clamping will allow.
    Type: Grant
    Filed: July 2, 1976
    Date of Patent: December 27, 1977
    Assignee: Motorola, Inc.
    Inventors: Edmund Arthur Reese, Charles Shelley Meyer, George S. Leach, Jr.
  • Patent number: 4028671
    Abstract: The number of devices and integrated circuit area required to enter new data or to recirculate data in a charge coupled storage memory is reduced by employing separated charge source areas interconnected to selective enabling means and appropriate phasing signals.
    Type: Grant
    Filed: October 6, 1975
    Date of Patent: June 7, 1977
    Assignee: Motorola, Inc.
    Inventor: George S. Leach, Jr.