Abstract: A power amplifier circuit (10) for a TDMA transmitter. The amplifier circuit (10) includes an FET amplifier (14), a current sensing resistor (24) that senses the quiescent drain current of the FET amplifier (14), and a switch (26) coupled across the sensing resistor (24). When data transmission bursts are being amplified by the amplifier circuit (10), a switch signal closes the switch (26) to bypass the sensing resistor (24) so that it does not dissipate power and reduce the efficiency of the amplifier circuit (10). When the data transmission is between data bursts, the switch signal opens the switch (26) to allow a voltage drop across the sensing resistor (24). The voltage drop is measured to determine the quiescent drain current of the FET amplifier (14) to maintain the drain current at the desirable operating point.

Abstract: A power amplifier circuit (10) for a TDMA transmitter. The amplifier circuit (10) includes an FET amplifier (14), a current sensing resistor (24) that senses the quiescent drain current of the FET amplifier (14), and a switch (26) coupled across the sensing resistor (24). When data transmission bursts are being amplified by the amplifier circuit (10), a switch signal closes the switch (26) to bypass the sensing resistor (24) so that it does not dissipate power and reduce the efficiency of the amplifier circuit (10). When the data transmission is between data bursts, the switch signal opens the switch (26) to allow a voltage drop across the sensing resistor (24). The voltage drop is measured to determine the quiescent drain current of the FET amplifier (14) to maintain the drain current at the desirable operating point.

Abstract: A programmable video interface (20) eliminates the need for select-in-test parts during manufacture. The video interface (20) includes a scaling module (40) and a programming module (60). The scaling module (40) converts an analog input signal into a digital output signal based on a plurality of analog programming signals. The programming module (60) generates the plurality of analog programming signals, where the analog programming signals maintain operation of the scaling module at a predetermined transfer characteristic and an associated tolerance. The programming module generates the plurality of analog programming signals based on digital programming data. The use of D/A converters (62, 64) in the programming module (60) allows the elimination of resistor divider networks and associated tolerance problems.