Abstract: A miss distance scoring system comprising four antennas which are configu to provide for an optimal radiation pattern of pulsed radio frequency energy to determine a missile's miss distance and miss direction from a target. Reflected pulses from a missile are received by each of the four antennas and then supplied by a radio frequency switch to a scalar scoring system which provides an analog video signal to four analog switches. The four analog switches are also connected to a controller which provides control signals to the switches to separately activate each switch. The activated analog switch then samples and holds the analog video signal with the sample being provided to an associated bandpass filter of the switch which is one of four bandpass filters. The sampled portions of the analog video signal are provided to a multiplexer and then passed sequentially through the multiplexer.

Abstract: A radar encoder comprising a delta modulation circuit which receives analog adar video data from a radar and then converts the data to digitized NRZL video data. The radar encoder also has an encoder circuit which receives the digitized NRZL video data as well as a trigger pulse signal and analog synchro signals from the radar. The synchro signals are provided to a Synchro-to-Digital Converter which converts the synchro signals to sixteen digital synchro data bits which are then latched into the converter. The synchro data bits are next parallel transferred to a pair of shift registers and then clocked in a serial format to a multiplexer. The multiplexer also receives the digitized NRZL video data supplied to the encoder circuit. A state machine, in response to the trigger pulse signal, generates control signals to latch the synchro data bits into the converter and then effect the parallel transfer of the synchro data bits from the converter to the shift registers.

Abstract: A radar decoder circuit for converting NRZL Data to radar video data which s supplied to a radar video display screen. The radar video circuit includes an Erasable Programmable Logic Device which decodes incoming NRZL data to identify a frame sync having twenty four data bits. When the frame sync is identified the location of sixteen bits of synchro data is also determined. The synchro data is then latched into a latch within the Erasable Programmable Logic Device for processing by a Digital-to-Synchro Converter. Control signals for effecting a transfer of the synchro data to the Digital-to-Synchro Converter are provided by enable and latch signal generating circuit within the Erasable Programmable Logic Device. The Digital-to-Synchro Converter converts the digital synchro data to analog synchro signals which are supplied to the radar video display allowing the display to indicate the direction the radar from which the NRZL data is received is pointing.

Abstract: In a video system, a video signal operates at a vertical scan rate to gente a first video frame characterized by a first number of lines per frame. A method and apparatus are provided to convert the first video frame into a second video frame characterized by a second number of lines per frame. The first video frame is stored at the vertical scan rate as digital samples. A portion of the stored digital samples from each line of the first video frame are retrieved at the vertical scan rate. The number of digital samples in the retrieved portion from each line of the first video frame is governed by a ratio equal to the second number divided by the first number, such that the retrieved portion from the first video frame is the second video frame.

Abstract: In a continuously variable slope delta modulation encoder or decoder, the slope of a reconstructed signal is varied by selecting the charging voltage across an integrating capacitor. For an NTSC video signal, the charging voltage may be selected by a shift register connected to a voltage divider supplying the integrating capacitor.