Abstract: In a communication network, a transmitting station sends encrypted messages for selective decryption in any one of several receiving stations. To that end, the transmitting station stores a single set of several encryption keys, each of which is for encrypting messages to all of the receiving stations. Also, for each message that is sent for decryption in a particular receiving station, the transmitting station (a) automatically selects at random any encryption key from the single set, (b) receives, from an input terminal, a control word which is a series of bits that uniquely identifies the particular receiving station, (c) encrypts both the message and the control word with the randomly selected key, and (d) transmits the result of step (c) to all of the receiving stations.

Abstract: A data processing system includes a plurality of data processing modules coupled to a bus and to a set of control lines. These modules request the use of the bus by sending respective sequences of at least two binary numbers during successive cycles on the control lines in synchronization with each other. On the control lines the numbers are logically ORed together. Each module terminates the sending of its numbers if, during any one of the successive cycles, the logical OR is greater than twice the number which the module itself is sending. A module uses the bus only if, during each of the successive cycles, the logical OR does not exceed the number which the module itself sends.

Abstract: In a communication network, a transmitting station sends encrypted messages to several receiving stations. Each receiving station stores one and the same set of decryption keys; and it stores a control word which is a series of bits that is unique to that station. Also, each receiving station identifies an encrypted message as being sent to it by -- (a) automatically selecting a decryption key at random from the set, (b) performing a decrypt operation on the same portion of the encrypted message from the transmitting station using the selected key, (c) comparing the result of the decrypt operation to its stored control word, and (d) repeating steps (a) thru (c) until either a match occurs or all keys in the set have been selected.

Abstract: Disclosed is a memory system for reading and writing variable length data fields. Each of the data fields are addressed by the combination of a word address, a bit address, and a field length. Internal to the memory system, a total of 2N cells are addressed by each word address where N is the maximum field length. But only a portion of the addressed cells are selectively enabled in response to the bit address and field length. An N bit shifter right justifies the output data from the selectively enabled cells, and also realigns right justified input data to be written into the selectively enabled cells.

Abstract: This disclosure relates to a network of stations having a single transmission bus. A bus assignment control line is daisy-chained to all of the stations to form a closed loop such that an assignment signal will circulate through the loop and return to the originating station after each station has been given an equal chance to be serviced. Stations of a lower priority can be attached to the bus in such a manner that the preceding station will direct the bus assignment control signal to the lower priority stations with a frequency less than the transmission of the assignment control signal to a succeeding higher priority station.

Abstract: This disclosure relates to a network of stations having a single transmission bus. A bus assignment control line is daisy-chained to all of the stations to form a closed loop such that an assignment signal will circulate through the loop and return to the originating station after each station has been given an equal chance to be serviced. Each station is provided with means to detect when the preceding station is malfunctioning or is not turned on, and in response thereto, to transmit a bus assignment control signal to the next succeeding station if it itself does not require access to the transmission bus.

Abstract: This disclosure relates to a network of stations having a single transmission bus. A bus assignment control line is daisy-chained to all of the stations to form a closed loop such that an assignment signal will circulate through the loop and return to the originating station after each station has been given an equal chance to be serviced. Once the bus is assigned to a station, data is transmitted over it and the receiving station returns an acknowledgment signal over a separate acknowledgment line common to all stations. The station that sent the transmission will accept acknowledgment signals only during a finite period of time after its own transmission so as not to be interrupted by other acknowledgment signals at a later time.

Abstract: Disclosed is a data processing system which includes a plurality of devices that communicate in a time-shared fashion over a single data bus. The system also includes a network of arbiters and a network of selectors. These networks interconnect the plurality of devices, and they operate to insure that only one device transmits on the bus at a time. The networks are asynchronous and modular in design.