Patents by Inventor George Valliath

George Valliath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030015134
    Abstract: Semiconductor structures and a method for fabricating semiconductor structures optimized for use in free space optical interconnect systems are disclosed. The semiconductor structures includes a optical component die edge mounted on a carrier structure. The die is formed using high quality epitaxial layers of monocrystalline compound semiconductor materials grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the compound semiconductor monocrystalline layers. The die is edge mounted to the carrier structure such that light beams emitted or detected by devices on the die are parallel to the surface of the carrier structure.
    Type: Application
    Filed: July 18, 2001
    Publication date: January 23, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Aroon Tungare, George Valliath
  • Patent number: 6046541
    Abstract: A flat panel display (12) includes a backplate (14) and a faceplate (16) attached to the backplate (14) defining a vacuum enclosure (18) therebetween. A spacer (46, 62, 64, 78, 80, 90) is positioned between the backplate (14) and the faceplate (16). The spacer geometry is anti-symmetrical and non-integral with respect to an array of electron emitters (30, 48, 76) on a cathode plate (22) overlying the backplate (14). The spacers have a curved surface (52, 78, 82) that is characterized by a radius r, or by a length d.sub.3 of a unit shape having bend angles .alpha. and .beta., whereas the electron emitter arrays are characterized by orthogonally arranged rows (32) and columns (34). The anti-symmetrical and non-integral relationship between the spacers (46, 62, 64, 78, 80, 90) and the electron emitters reduces the number of electron emitters and pixels (49, 77, 86) that are occluded by the spacers.
    Type: Grant
    Filed: December 15, 1997
    Date of Patent: April 4, 2000
    Assignee: Motorola, Inc.
    Inventors: George Valliath, Kevin Jelley, Robert Akins, Pankaj Desai