Abstract: A system for provisioning credentials onto an electronic device is provided. The system may include a payment network subsystem, a service provider subsystem, a primary user device, and a secondary user device. The user may select a particular payment card to provision onto the secondary user device by providing an input at the primary user device. A broker module running on the service provider subsystem may then transfer a disabled pass to the secondary user device. Concurrently, the payment network subsystem may direct a trusted service manager module on the service provider subsystem to write credential information onto a secure element within the secondary user device. Once the secure element has been updated, the broker module may provide an activated pass to the secondary user device so that the secondary user device can be used to perform NFC-based financial transactions at a merchant terminal.

Abstract: A noise discriminator circuit and a noise discrimination method in a burst mode receiver is configured to determine the validity of an incoming burst signal by analyzing the timing of the signal edges of incoming signal to look for a time duration conforming to the preamble data bits of a valid burst signal. In one embodiment, the noise discriminator circuit and method analyze the time duration between signal edges of the same pulse of an incoming signal. In another embodiment, the noise discriminator circuit and method analyze the time duration between a first set of pulses of an incoming signal and the time duration between signal edges of a second set of pulses of the incoming signal. When the time durations are within a given time range relating to a predetermined timing separation of a valid burst signal, the incoming signal is validated as a valid burst signal.

Abstract: A noise discriminator circuit and a noise discrimination method in a burst mode receiver is configured to determine the validity of an incoming burst signal by analyzing the timing of the signal edges of incoming signal to look for a time duration conforming to the preamble data bits of a valid burst signal. In one embodiment, the noise discriminator circuit and method analyze the time duration between signal edges of the same pulse of an incoming signal. In another embodiment, the noise discriminator circuit and method analyze the time duration between a first set of pulses of an incoming signal and the time duration between signal edges of a second set of pulses of the incoming signal. When the time durations are within a given time range relating to a predetermined timing separation of a valid burst signal, the incoming signal is validated as a valid burst signal.

Abstract: A noise discriminator circuit and a noise discrimination method in a burst mode receiver is configured to determine the validity of an incoming burst signal by analyzing the timing of the signal edges of incoming signal to look for a time duration conforming to the preamble data bits of a valid burst signal. In one embodiment, the noise discriminator circuit and method analyze the time duration between signal edges of the same pulse of an incoming signal. In another embodiment, the noise discriminator circuit and method analyze the time duration between a first set of pulses of an incoming signal and the time duration between signal edges of a second set of pulses of the incoming signal. When the time durations are within a given time range relating to a predetermined timing separation of a valid burst signal, the incoming signal is validated as a valid burst signal.

Abstract: A noise discriminator circuit and a noise discrimination method in a burst mode receiver is configured to determine the validity of an incoming burst signal by analyzing the timing of the signal edges of incoming signal to look for a time duration conforming to the preamble data bits of a valid burst signal. In one embodiment, the noise discriminator circuit and method analyze the time duration between signal edges of the same pulse of an incoming signal. In another embodiment, the noise discriminator circuit and method analyze the time duration between a first set of pulses of an incoming signal and the time duration between signal edges of a second set of pulses of the incoming signal. When the time durations are within a given time range relating to a predetermined timing separation of a valid burst signal, the incoming signal is validated as a valid burst signal.

Abstract: A laser bias control and monitoring circuit receives a monitor diode current on an input node and generate a bias current for a laser diode on an output node where the monitor diode current flows into (positive polarity) or out of (negative polarity) the input node. The laser bias control and monitoring circuit includes a polarity independent current sensing circuit configured to receive the monitor diode current in either positive or negative polarity and to generate a normalized output current having a magnitude proportional to a magnitude of the monitor diode current. In this manner, the laser bias control and monitoring circuit can be used with laser diode and monitor diode combination in either the common anode or the common cathode configuration, or with the monitor diode current being provided from the anode or cathode of the monitor diode. No reprogramming or reconfiguration of the circuit is required.

Abstract: A laser bias control and monitoring circuit receives a monitor diode current on an input node and generate a bias current for a laser diode on an output node where the monitor diode current flows into (positive polarity) or out of (negative polarity) the input node. The laser bias control and monitoring circuit includes a polarity independent current sensing circuit configured to receive the monitor diode current in either positive or negative polarity and to generate a normalized output current having a magnitude proportional to a magnitude of the monitor diode current. In this manner, the laser bias control and monitoring circuit can be used with laser diode and monitor diode combination in either the common anode or the common cathode configuration, or with the monitor diode current being provided from the anode or cathode of the monitor diode. No reprogramming or reconfiguration of the circuit is required.

Abstract: An interface system couples a fixed impedance device to a receiver for transmitting data signals at different data rates at different times. The interface system includes elements that are connected to provide different time constants of responsiveness to data signals of higher and lower data rates without distorting the data signals beyond usability.

Abstract: A system for selectively disabling use of at least selected features of a stand-alone electronic device under a predetermined set of conditions. The system establishes a state of the set of conditions as being satisfied or unsatisfied, communicates the state to the electronic device, and disables the selected features if the state is satisfied. In one embodiment, the system may be advantageously be used to prevent vehicular accidents by at least partially disabling non-emergency use of a wireless telephone in a moving vehicle. In another embodiment, the system may be used to disable features of an electronic device within a predetermined area having a boundary that is independent of a communications network cell.

Abstract: A thermocouple jacket monitor is disclosed. The thermocouple monitor is constructed utilizing an inner jacket and an outer jacket with a replaceable conductive metal strip sandwiched between the inner jacket and a central insulator housing the thermocouple junctions. The conductive metal strip is connected to an alarm circuit in the thermocouple head. When the outer and inner jackets are corroded away by a molten material, such as molten glass, exposing the conductive metal strip to the molten material, the alarm such as a light on the thermocouple head, or the control panel or both, is lit notifying the operator that the thermocouple is damaged and needs to be replaced. If a two-way continuity alarm circuit is utilized, a second alarm light is activated when any portion of the conductive metal strip is corroded to the extent of being separated.

Abstract: A gate valve includes a body which includes first and second valve seats. First and second gates are mounted for movement adjacent to the valve seats, and each of the gates has an outer face adapted to seal against the respective valve seat and an inner face which defines a thrust pad. A wedge is interposed between the first and second gates, and the wedge defines first and second converging wedge faces rigidly positioned with respect to one another to bear against the respective thrust pads. At least one of the thrust pads and the wedge faces defines a convex surface. A hand wheel axially moves the wedge with respect to the body and the wedge is coupled to the gates such that movement of the wedge away from the valve seats moves the gates away from the valve seats. The convex surface allows the respective gate to articulate with respect to the wedge as necessary to align with the valve seat.

Abstract: A temperature control system for a forehearth, said forehearth for thermally conditioning molten glass to be fed to a glassware forming machine, and being divided into a plurality of zones. Each of the forehearth zones is provided with devices for monitoring the temperature of molten glass within the zone, and apparatus for selectively heating the glass. A microprocessor-based time sharing system controls the temperature of the plurality of zones, using adaptive control loops. Each zone is assigned a time period for monitoring temperature and taking appropriate corrective action. Temperature adjustments may be made independently zone-by-zone, or in cooperation, and other physical parameters may be taken into account such as glass viscosity or combustion pressure. Certain time-sharing periods may be associated with monitoring and displaying functions only.

Abstract: A redundant memory circuit having a memory for storing information in a matrix of interconnected rows and columns, and a row and a column address decoder to access the rows and columns. The memory has a redundant row or rows to replace a defective row or rows in the matrix and a programmable decoder which is programmed with the row address of the defective row to access the redundant row. The row and column address decoders are used to access the defective row and to sequentially access the columns so as to entirely disconnect the defective row from the columns. The programmable decoder is then programmed with the defective row address, bit by bit, in response to the column addresses, to access the redundant row. After this procedure, a verification circuit can be used to verify that the redundant row can be accessed and that the programmable decoder is properly programmed to decode only one address to one row.

Abstract: A sense amplifier and sensing scheme for sensing the normal or blown condition of fuses in a programmable read only memory (PROM) or similar device. A sensing circuit is provided with a threshold level separating high and low input levels indicative of the fuse condition. The sensing circuit has one circuit branch with a first current mirror with a temperature characteristic which provides a threshold level which is slightly divergent with reference to a low level input. Another circuit branch clamps the high input level to the slightly divergent threshold level and uses a second current mirror with a temperature characteristic which provides a high level slightly more divergent than the threshold level. By selecting mirror currents proportionally, high level and threshold level temperature characteristic divergence can be proportionally controlled in selected amounts with respect to the low level.

Abstract: A circuit and method for providing a desired resistor ratio whereby an output voltage may be derived across one of the members of the ratio pair. A voltage regulator is connected between first and second resistors of the ratio pair to provide voltage compensation partially dependent on third and fourth resistors within the regulator such that the error in each of the resistances of the desired ratio pair is cancelled by matching errors in the third and fourth resistances of the voltage regulator.

Abstract: A memory cell is provided which comprises a word line, a current source line, a pair of bit lines, a first transistor having a base terminal, a collector terminal coupled to the word line, a first emitter coupled to a first of the pair of bit lines, a second emitter coupled to the current source line, a second transistor having a base terminal coupled to the collector terminal of the first transistor, a collector terminal coupled to the word line and to the base of the first transistor, a first emitter coupled to a second of the pair of bit lines, and a second emitter coupled to the current source line, and means for directing more current through the second transistor than through the first transistor.

Abstract: A system for selectively disabling use of at least selected features of a stand-alone electronic device under a predetermined set of conditions. The system establishes a state of the set of conditions as being satisfied or unsatisfied, communicates the state to the electronic device, and disables the selected features if the state is satisfied. In one embodiment, the system may be advantageously be used to prevent vehicular accidents by at least partially disabling non-emergency use of a wireless telephone in a moving vehicle. In another embodiment, the system may be used to disable features of an electronic device within a predetermined area having a boundary that is independent of a communications network cell.