Abstract: Described herein are embodiments of methods and systems of using a timer based memory buffer for metrology. One embodiment of the method comprises receiving metrology data from one or more metrology sensors; writing at least part of the metrology data to a volatile memory; incrementing a write pointer to indicate the metrology data contained within the volatile memory; and repeating the above until a timer expires, then reading at least a portion of the metrology data from the volatile memory.

Abstract: A system for generating an energy usage profile of an electrical device is provided. The system includes a meter configured to measure electric energy usage; a memory area for storing an energy usage profile corresponding to one or more electrical devices associated with the electric meter, and at least one processor. The at least one processor is programmed to receive a request to turn off power to each of the one or more electrical devices associated with the meter, receive a request to turn on a first electrical device of the one or more electrical devices, obtain a ramp up waveform of energy usage of the first electrical device, convert the ramp up waveform to a digital signature, and store the ramp up digital signature of the first electrical device in the memory area.

Abstract: A system for monitoring operation of an electric vehicle charging station is provided. The system includes a battery charger configured to couple to a device for supplying current to the device, a current sensor coupled to the battery charger for measuring current supplied from the battery charger to the device, the current sensor configured to generate a measured current profile based on the measured current supplied to the device, and a processor coupled to the current sensor. The processor is configured to receive the measured current profile transmitted from the current sensor, and compare the measured current profile to at least one known current profile to monitor operation of the charging station.

Abstract: Described herein are embodiments of methods and systems of using a timer based memory buffer for metrology. One embodiment of the method comprises receiving metrology data from one or more metrology sensors; writing at least part of the metrology data to a volatile memory; incrementing a write pointer to indicate the metrology data contained within the volatile memory; and repeating the above until a timer expires, then reading at least a portion of the metrology data from the volatile memory.

Abstract: A method of delivering energy to an electric vehicle with a charging device positioned within a parking area having a plurality of parking spaces is provided. The method includes calculating, by a parking validation device, a parking cost associated with a parking space used by the electric vehicle. An energy cost associated with an amount of energy delivered by the charging device to the electric vehicle is calculated. A retail transaction cost associated with an amount of retail purchases made at one or more commercial retail stores is calculated. The parking validation device determines whether to waive at least one of the calculated parking cost and the calculated energy cost based at least in part on the calculated retail transaction cost.

Abstract: A system for use in managing charge station transaction data is provided. The system includes at least one charging station and a billing server coupled in communication with the at least one charging station. The billing server is configured to receive transaction data from the at least one charging station, consolidate the transaction data, and transmit the consolidated transaction data to an electronic payment processor.

Abstract: A system for monitoring operation of an electric vehicle charging station is provided. The system includes a battery charger configured to couple to a device for supplying current to the device, a current sensor coupled to the battery charger for measuring current supplied from the battery charger to the device, the current sensor configured to generate a measured current profile based on the measured current supplied to the device, and a processor coupled to the current sensor. The processor is configured to receive the measured current profile transmitted from the current sensor, and compare the measured current profile to at least one known current profile to monitor operation of the charging station.

Abstract: Embodiments of the invention described herein use biometric information for authorizing charging an electric vehicle's (EV's) batteries using one of a plurality of electric vehicle charging stations (EVCSs) that are operably connected with a master station. In one aspect, a method of authorizing charging an EV's batteries using an EVCS is described.

Abstract: Embodiments of the invention described herein use biometric information for authorizing charging an electric vehicle's (EV's) batteries using an electric vehicle charging station (EVCS). In one aspect, a method of authorizing charging an EV's batteries using an EVCS is described. This embodiment of a method comprises storing, in a database, biometric identity information for one or more individuals; receiving, from a biometric information input device associated with an electric vehicle charging station (EVCS), input biometric identity information for a user; searching the database, using a processor, for biometric identity information for the one or more individuals that substantially match the input biometric identity information for the user; and authorizing the user to charge an electric vehicle's (EV's) batteries using the EVCS if the input biometric identity information for the user substantially matches biometric identity information for at least one of the one or more individuals in the database.

Abstract: Embodiments of the invention described herein use an electromagnetic signal produced by a switch mode power supply (SMPS) to track locations of an electric vehicle (EV). In one aspect, a method of tracking an EV is described. This embodiment of a method comprises receiving an actuation signal; and adjusting a SMPS in response to the actuation signal such that the switch mode power supply generates a detectable electromagnetic signal. The SMPS is used to provide alternating-current (AC) power to an electric motor of an electric vehicle (EV) or is used to provide direct-current (DC) power to a battery of the EV.

Abstract: A system for generating an energy usage profile of an electrical device is provided. The system includes a meter configured to measure electric energy usage; a memory area for storing an energy usage profile corresponding to one or more electrical devices associated with the electric meter, and at least one processor. The at least one processor is programmed to receive a request to turn off power to each of the one or more electrical devices associated with the meter, receive a request to turn on a first electrical device of the one or more electrical devices, obtain a ramp up waveform of energy usage of the first electrical device, convert the ramp up waveform to a digital signature, and store the ramp up digital signature of the first electrical device in the memory area.

Abstract: Distributed command and address bus architecture for memory modules and circuit boards is described. In one embodiment, a memory module includes a plurality of connector pins disposed on an edge of a circuit board, the plurality of connector pins comprising first pins coupled to a plurality of data bus lines, second pins coupled to a plurality of command and address bus lines, wherein the second pins are disposed in a first and a second region, wherein a portion of the first pins is disposed between the first and the second regions.

Abstract: Memory devices and memory modules are disclosed. In one embodiment, a memory device includes a semiconductor substrate having a first edge and a second edge opposed to the first edge. A plurality of memory banks is disposed at a central portion of the semiconductor substrate, each memory bank including a plurality of memory cells. A plurality of input/output contacts is disposed between the first edge and the memory banks. Delay locked loop circuitry is disposed adjacent the first edge. A plurality of address and command contacts is disposed between the second edge and the memory banks.

Abstract: Horizontal dual in-line memory modules are disclosed. In one embodiment, the memory module includes a circuit board, a plurality of memory chips attached to a top surface of the circuit board, and a plurality of connector contacts disposed under a back surface of the circuit board and extending away from the memory chips, the connector contacts being electrically coupled to the memory chips, the back surface opposite the top surface of the circuit board.

Abstract: Distributed command and address bus architecture for memory modules and circuit boards is described. In one embodiment, a memory module includes a plurality of connector pins disposed on an edge of a circuit board, the plurality of connector pins comprising first pins coupled to a plurality of data bus lines, second pins coupled to a plurality of command and address bus lines, wherein the second pins are disposed in a first and a second region, wherein a portion of the first pins is disposed between the first and the second regions.

Abstract: Horizontal dual in-line memory modules are disclosed. In one embodiment, the memory module includes a circuit board, a plurality of memory chips attached to a top surface of the circuit board, and a plurality of connector contacts disposed under a back surface of the circuit board and extending away from the memory chips, the connector contacts being electrically coupled to the memory chips, the back surface opposite the top surface of the circuit board.

Abstract: Memory devices and memory modules are disclosed. In one embodiment, a memory device includes a semiconductor substrate having a first edge and a second edge opposed to the first edge. A plurality of memory banks is disposed at a central portion of the semiconductor substrate, each memory bank including a plurality of memory cells. A plurality of input/output contacts is disposed between the first edge and the memory banks. Delay locked loop circuitry is disposed adjacent the first edge. A plurality of address and command contacts is disposed between the second edge and the memory banks.

Abstract: Memory modules, computing systems, and methods of manufacturing memory modules are disclosed. In one embodiment, a memory module includes a substrate having a first side and a second side opposed to the first side. A plurality of pins is disposed on the first side of the substrate. A first plurality of memory chips are arranged in a first chip layer, the first chip layer overlying the second side of the substrate. Electrical contacts of the first plurality of memory chips are electrically coupled to the pins. A second plurality of memory chips is arranged in a second chip layer, the second chip layer overlying the first chip layer. Electrical contacts of the second plurality of memory chips are electrically coupled to the pins.

Abstract: Methods and apparatuses for adjusting trim settings for internally generated voltages of an integrated circuit device are provided. In one embodiment the apparatus receives a target digital value for an internally generated voltage, and compares the target digital value to a current digital value for the internally generated voltage. If the comparison indicates that a difference between the target digital value and the current digital value is greater than an allowable threshold, a trim setting used to trim the internally generated voltage is adjusted based on the difference. The trim setting may be adjusted until the difference between the target digital value and the current digital value is less than or equal to the allowable threshold.

Abstract: Methods and apparatuses for adjusting trim settings for internally generated voltages of an integrated circuit device are provided. In one embodiment the apparatus receives a target digital value for an internally generated voltage, and compares the target digital value to a current digital value for the internally generated voltage. If the comparison indicates that a difference between the target digital value and the current digital value is greater than an allowable threshold, a trim setting used to trim the internally generated voltage is adjusted based on the difference. The trim setting may be adjusted until the difference between the target digital value and the current digital value is less than or equal to the allowable threshold.