Patents by Inventor Georges Antoun Elias Ghattas

Georges Antoun Elias Ghattas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11144691
    Abstract: Disclosed herein are example embodiments of methods, apparatus, and systems for transactors configured for use in a hardware emulation environment and designed to adapt to speed changes dynamically at runtime in addition to providing dynamic port mapping. Among the embodiments disclosed herein is an emulation system comprising one or more configurable hardware components (e.g., configurable logic blocks) configured to implement a mutable port group transactor in communication with a design under test being emulated by the emulation system. The emulation system can further comprise a host computer in communication with the emulator and configured to provide configuration commands to the emulator that alter the mutable port group transactor from a first configuration to a second configuration.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: October 12, 2021
    Assignee: Siemens Industry Software Inc.
    Inventors: Georges Antoun Elias Ghattas, Mohamed Ahmed Mostafa Shaaban, Robert John Bloor
  • Patent number: 10572623
    Abstract: This application discloses a computing system having a virtual machine and a host program that communicate via a virtual interface. The virtual machine can generate a data packet for transmission to the host program via the virtual interface. The virtual machine can receive a saturation signal generated by a virtual interface driver in the virtual interface. The virtual interface driver can be configured to populate a virtual buffer in the virtual interface with the data packet. The virtual machine can determine an availability of resources in the virtual buffer to store the data packet based, at least in part, on the saturation signal, and selectively stall transmission of the data packet to the host program based, at least in part, on the saturation signal. The host program can bypass a hypervisor in the computing system to directly access the virtual buffer in the virtual interface.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: February 25, 2020
    Assignee: Mentor Graphics Corporation
    Inventors: Ankit Garg, John R. Stickley, Deepak Kumar Garg, Georges Antoun Elias Ghattas, Hanan Mohamed Sameh Tawfik, Abdallah Galal Yahya Khalil
  • Publication number: 20190155985
    Abstract: A system may include a hardware-based emulation platform configured to emulate operation of a design-under-test (“DUT”), a database system, and a verification system. The verification system may include a storage system which may include a memory layer and a local storage layer, where the memory layer has a lower memory access latency than the local storage layer. The verification system may also include a design verification engine configured to send test data to the hardware-based emulation platform; buffer response data received from the DUT into the memory layer and the local storage layer; determine to aggregate the response data stored in both the memory layer and local storage layer into a write transaction according to buffering criteria, and issue the write transaction to the database system to store the aggregated response data in the database system.
    Type: Application
    Filed: November 19, 2018
    Publication date: May 23, 2019
    Inventors: Georges Antoun Elias Ghattas, John Samir Ramses Wasef, Mohamed Ahmed Mostafa Shaaban
  • Publication number: 20170351795
    Abstract: Disclosed herein are example embodiments of methods, apparatus, and systems for transactors configured for use in a hardware emulation environment and designed to adapt to speed changes dynamically at runtime in addition to providing dynamic port mapping. Among the embodiments disclosed herein is an emulation system comprising one or more configurable hardware components (e.g., configurable logic blocks) configured to implement a mutable port group transactor in communication with a design under test being emulated by the emulation system. The emulation system can further comprise a host computer in communication with the emulator and configured to provide configuration commands to the emulator that alter the mutable port group transactor from a first configuration to a second configuration.
    Type: Application
    Filed: May 12, 2017
    Publication date: December 7, 2017
    Applicant: Mentor Graphics Corporation
    Inventors: Georges Antoun Elias Ghattas, Mohamed Ahmed Mostafa Shaaban, Robert John Bloor
  • Patent number: 8954312
    Abstract: The invention provides for the interaction of an emulator emulating an electronic design having a communication bus communicating with a software application over the emulated communication bus. The interaction is facilitated in such a manner as to provide an appropriate latency for the emulated communication bus. According to various implementations of the invention, a protocol proxy is provided. The protocol proxy is designed to be emulated along with an electronic design and configured to communicate to software executing on a computer connected to the emulator. The protocol proxy includes a protocol module that communicates to the electronic design being emulated in the emulator environment. Furthermore, the protocol proxy includes a software control module that communicates to the software outside the emulator through proxy communication channels. Further still, the protocol proxy includes a data storage component.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: February 10, 2015
    Assignee: Mentor Graphics Corporation
    Inventors: Luis Lloret Portillo, Georges Antoun Elias Ghattas, Noah Wagdy Shawky Tadros
  • Publication number: 20110307239
    Abstract: The invention provides for the interaction of an emulator emulating an electronic design having a communication bus communicating with a software application over the emulated communication bus. The interaction is facilitated in such a manner as to provide an appropriate latency for the emulated communication bus. According to various implementations of the invention, a protocol proxy is provided. The protocol proxy is designed to be emulated along with an electronic design and configured to communicate to software executing on a computer connected to the emulator. The protocol proxy includes a protocol module that communicates to the electronic design being emulated in the emulator environment. Furthermore, the protocol proxy includes a software control module that communicates to the software outside the emulator through proxy communication channels. Further still, the protocol proxy includes a data storage component.
    Type: Application
    Filed: June 13, 2011
    Publication date: December 15, 2011
    Inventors: Luis Lloret Portillo, Georges Antoun Elias Ghattas, Noah Wagdy Shawky Tadros