Abstract: An SIMD array processor having a scalable and flexible architecture. The SIMD array architecture includes an array of processing elements, a plurality of processor controllers, and at least one other computer system. A system area network interconnects at least one user computer with the processor controllers and the computer system; and, a storage area network interconnects at least one storage device with the processor controllers and the computer system. The SIMD array architecture is adapted to allow different user computers to use different portions of the array of processing elements and/or different processor controllers and computer systems simultaneously. The array of processing elements has a hierarchical structure comprising backplanes, PCB's, ASIC's, and arrays of processing elements. The SIMD array architecture can be scaled by increasing the quantity of backplanes, PCB's, ASIC's, and/or by increasing the size of the arrays of processing elements.

Abstract: Methods and systems to interface a SIMD array to a host computer operating system using one or more context sensitive filter controllers. The filter controllers or drivers can intercept I/O requests from the host operating system and redirect the requests to the SIMD array. By using the filter controllers, the SIMD array can be viewed by the host operating system as a file, database engine, and/or other storage device including a hard drive. Based on the request from the host, including the data content, document type, document content, and document or data format associated with the request, the filter controllers can provide a set of instructions to process the request using the SIMD array, while exploiting the parallel processing power of the SIMD array.