Patents by Inventor Georges Nabaa

Georges Nabaa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FPGA ARCHITECTURE WITH THRESHOLD VOLTAGE COMPENSATION AND REDUCED LEAKAGE
    Publication number: 20080180129
    Abstract: A method for providing transistor threshold voltage compensation in an FPGA integrated circuit with a plurality of programmable circuit blocks includes measuring the effective transistor threshold voltage values of each programmable circuit block and adjusting the effective transistor threshold voltage values of each programmable circuit block to compensate for the difference between the measured effective transistor threshold voltage value and the target effective transistor threshold voltage value.
    Type: Application
    Filed: August 30, 2007
    Publication date: July 31, 2008
    Inventors: Georges Nabaa, Farid Najm, Navid Azizi