Patents by Inventor Georges Thiebaut

Georges Thiebaut has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5138607
    Abstract: A memory location is assigned to each virtual circuit, this location containing a context (CT) that defines the evaluation conditions for measuring the throughput of the virtual circuit and then, upon reception of each cell, providing for the context relating to the virtual circuit to which the cell belongs to be read. A clock signal is adapted to supply a current time associated with this virtual circuit. An indication of the measuring interval start time is written into the context (CT) for a virtual circuit upon arrival of a first cell for this virtual circuit. Upon the arrival of a subsequent cell for this virtual circuit, the context is read and from the current time (hc) the time interval start time is subtracted. The time difference is compared to a specified measurement interval duration and the number of cells already received is incremented.
    Type: Grant
    Filed: June 20, 1990
    Date of Patent: August 11, 1992
    Assignee: Alcatel Cit
    Inventors: Georges Thiebaut, Denis Le Bihan
  • Patent number: 5132961
    Abstract: A memory location is assigned to each virtual circuit, this location containing a context (CT) that defines the evaluation conditions for measuring the throughput of the virtual circuit and then, upon reception of each cell, providing for the context relating to the virtual circuit to which the cell belongs to be read. A clock signal is adapted to supply a current time associated with this virtual circuit, and throughput measurement circuits supply, at the arrival of a cell, a virtual circuit throughput measurement for this virtual circuit.
    Type: Grant
    Filed: June 20, 1990
    Date of Patent: July 21, 1992
    Assignee: Alcatel Cit
    Inventors: Georges Thiebaut, Denis Le Bihan
  • Patent number: 5119364
    Abstract: A memory (MCT) is used in which a location is assigned to each virtual circuit, this location containing a context (CT) that defines the evaluation conditions of the throughput of the virtual circuit and, upon reception of each cell, providing for the context relating to the virtual circuit to which the cell belongs to be read, for the purpose of evaluating the throughput of the virtual circuit. A clock signal (BC) is used to supply a current time associated with this virtual circuit.
    Type: Grant
    Filed: June 20, 1990
    Date of Patent: June 2, 1992
    Assignee: Alcatel Cit
    Inventors: Georges Thiebaut, Denis Le Bihan
  • Patent number: 5012465
    Abstract: A central switching facility is constituted by two switching networks connected to each of the connection units via two connection circuits. A connection circuit selects on a timeslot-by-timeslot basis which output network link is to be used for conveying each time slot to the connection unit. On an instruction from the switching network, a connection circuit operates, in a message mode, on one of the time slots selected from those which it processes, and it sends monitoring information to the switching network via control bits in that time slot. An instruction bit, selecting a message mode or a normal mode, is included in each frame transmitted from the switching network to a connection circuit.
    Type: Grant
    Filed: February 2, 1990
    Date of Patent: April 30, 1991
    Assignee: Alcatel Cit
    Inventors: Didier Helou, Jean-Yves Peron, Rene Coutin, Georges Thiebaut
  • Patent number: 4320501
    Abstract: The space switch has an inlet series to parallel converter (1) arranged to take sequential data from the i-th time slot of each of a plurality of synchronized inlet multiplexes and apply them simultaneously to a parallel connection (11) within one time slot period. These time slots are written into one of two signal stores (2 and 3), e.g. sequentially. A control store (4) controls the order in which data is read from the signal store and re-assembled into outlet multiplexes by a parallel to series converter (5), thereby performing space switching between the stored time slots. The signal stores alternate between reading and writing, and each has a capacity equal to the product of the number (p) of inlet multiplexes (E1, . . . Ep) multiplied by a submultiple of the number of time slots to a frame. When the submultiple is greater than 1 there is a possibility of limited time switching within a sector of successive time slots, the number of time slots in each sector being equal to the submultiple.
    Type: Grant
    Filed: October 30, 1979
    Date of Patent: March 16, 1982
    Assignee: Compagnie Industrielle des Telecommunications Cit-Alcatel
    Inventors: Bernard Le Dieu, Georges Thiebaut
  • Patent number: 4261631
    Abstract: A connector comprises a base portion provided with contacts, a movable block and a device for displacing the movable blocks perpendicularly to the base portion, operation of the displacing device causing the movable block to take up a raised position in which it is possible to insert above the base portion a printed circuit board bearing contacts on one side facing the base portion, and a lowered position in which the printed circuit board is pressed against the said contacts provided on the base portion.
    Type: Grant
    Filed: May 2, 1979
    Date of Patent: April 14, 1981
    Assignee: Compagnie Industrielle des Telecommunications Cit-Alcatel
    Inventors: Bernard Guilcher, Julien Jonchere, Georges Thiebaut