Patents by Inventor Georgi Nedeltchev Gaydadjiev

Georgi Nedeltchev Gaydadjiev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8910001
    Abstract: Method for testing a memory under test (1) including a plurality of memory cells and a Memory Built-In Self-Test Engine (2) connectable to a memory under test. The MBIST engine (2) is arranged to generate appropriate addressing and read and/or write operations to the memory under test (1). The MBIST engine (2) is connected to a March Element Stress register (MESR) (3), a generic march element register (GMER) (4), and a Command Memory (5). The GMER (4) specifies one of a set of Generic March Elements (GME), and the MESR (3) specifies the stress conditions to be applied. Only a few GMEs are required in order to specify most industrial algorithms. The architecture is orthogonal and modular, and all speed related information is contained in the GME. In addition, only little memory is required for the specification of the test, providing a low implementation cost, yet with a high flexibility.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: December 9, 2014
    Assignee: Technische Universiteit Delft
    Inventors: Said Hamdioui, Zaid Al-Ars, Georgi Nedeltchev Gaydadjiev, Adrianus van de Goor
  • Publication number: 20130086440
    Abstract: Method for testing a memory under test (1) including a plurality of memory cells and a Memory Built-In Self-Test Engine (2) connectable to a memory under test. The MBIST engine (2) is arranged to generate appropriate addressing and read and/or write operations to the memory under test (1). The MBIST engine (2) is connected to a March Element Stress register (MESR) (3), a generic march element register (GMER) (4), and a Command Memory (5). The GMER (4) specifies one of a set of Generic March Elements (GME), and the MESR (3) specifies the stress conditions to be applied. Only a few GMEs are required in order to specify most industrial algorithms. The architecture is orthogonal and modular, and all speed related information is contained in the GME. In addition, only little memory is required for the specification of the test, providing a low implementation cost, yet with a high flexibility.
    Type: Application
    Filed: March 16, 2011
    Publication date: April 4, 2013
    Applicant: TECHNISCHE UNIVERSITEIT DELFT
    Inventors: Said Hamdioui, Zaid Al-Ars, Georgi Nedeltchev Gaydadjiev, Adrianus Van de Goor
  • Publication number: 20120066410
    Abstract: Method and computer system for constructing a decision tree for use in address lookup of a requested address in an address space. The address space is arranged as a set of basic address ranges. Each basic address range is defined by a lower and an upper bound address, and an address in the address space is represented by a predetermined number of bits.
    Type: Application
    Filed: April 26, 2010
    Publication date: March 15, 2012
    Applicant: TECHNISCHE UNIVERSITEIT DELFT
    Inventors: George Stefanakis, Ioannis Sourdis, Georgi Nedeltchev Gaydadjiev, Ruben De Smet