Patents by Inventor Georgios MADEMLIS

Georgios MADEMLIS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240176377
    Abstract: The disclosure relates to a method for operating a gate driver system for a multi-level converter system. The multi-level converter system has a number of cascaded switching modules. The gate driver system comprises at least two gate driver units, each being configured to operate an associated switching module. The method comprises providing at least a first subset and a second subset of gate driver units and assigning a first switching speed to the gate driver units of the first subset and a second switching speed to the gate driver units of the second subset. A first switching control signal is provided to the switching modules being associated with the gate driver units of the first subset and a second switching control signal is provided to the switching modules being associated with the gate driver units of the second subset.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Inventors: Georgios MADEMLIS, Raik ORBAY, Per TORSTENSSON
  • Publication number: 20240106100
    Abstract: An electromagnetic filter assembly for attenuating electromagnetic interferences can comprise a base plate comprising a first opening configured to be penetrated by a first conductor from which an electromagnetic interference at least partially originates, wherein the base plate comprises an electrically non-conductive carrier layer, an electrically conductive first layer section, and an electrically conductive second layer section, wherein the first layer section comprises a shielding interface configured to connect the first layer section to a shielding in an electrically conductive manner, wherein the second layer section comprises a first conductor interface configured to connect the second layer section to the first conductor in an electrically conductive manner, and wherein the first layer section and the second layer section are capacitively coupled via at least two discrete capacitor elements.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 28, 2024
    Inventors: Anders LASSON, Torstensson PER, Georgios MADEMLIS, Kurt ERIKSSON