Patents by Inventor Georgios Mylonas

Georgios Mylonas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Phase-locked loop (PLL) calibration
    Patent number: 11212017
    Abstract: An apparatus is disclosed that implements phase-locked loop (PLL) calibration. In an example aspect, the apparatus includes a PLL and a signal extraction path. The PLL includes an error determiner with an error output node and a loop filter with a filter input node and a filter output node. The filter input node is coupled to the error output node. The PLL also includes a voltage-controlled oscillator (VCO) with a VCO input node. The VCO input node is coupled to the filter output node. The PLL further includes a PLL tap node coupled between the filter output node and the VCO input node. The signal extraction path includes at least one switch, with the signal extraction path coupled to the PLL tap node.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: December 28, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Philip Jones, Georgios Mylonas, Andrew Gordon Summers, Oleg Popov
  • Phase-Locked Loop (PLL) Calibration
    Publication number: 20210083782
    Abstract: An apparatus is disclosed that implements phase-locked loop (PLL) calibration. In an example aspect, the apparatus includes a PLL and a signal extraction path. The PLL includes an error determiner with an error output node and a loop filter with a filter input node and a filter output node. The filter input node is coupled to the error output node. The PLL also includes a voltage-controlled oscillator (VCO) with a VCO input node. The VCO input node is coupled to the filter output node. The PLL further includes a PLL tap node coupled between the filter output node and the VCO input node. The signal extraction path includes at least one switch, with the signal extraction path coupled to the PLL tap node.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 18, 2021
    Inventors: Philip Jones, Georgios Mylonas, Andrew Gordon Summers, Oleg Popov