Abstract: The present invention relates techniques for bidirectionally converting between a first format comprising N concurrent serial bit streams and a second format comprising a parallel TDM bit stream of N words using an array of storage elements, each bit stream comprising M-bits per word. In operation, the N words of the input bit stream(s) are sequentially shifted in a predetermined direction into the array of storage elements so that the N words lie parallel to each other along a first axis of the array. During the last clock period of the N words, the data associated with the storage elements not lying on a predetermined diagonal of the array are transposed across the predteremined diagonal so that the N words lie parallel to each other along a second orthogonal axis of the array. The transposed words are then shifted out of the array in the predetermined direction to provide an output for the converted output.

Abstract: A possible surge current which can develop during power initialization of CMOS circuit arrangements or at other instances, because of loss of an actual clock signal, is eliminated by controllably supplying an alternate clock signal to the CMOS devices in the circuit during intervals in which the actual clock signal is absent. The presence or absence of the actual clock signal is monitored continuously and when present, the actual clock signal is controllably supplied to the CMOS devices in place of the alternate clock signal.