Abstract: An out of lock detector for a sample and hold phase locked loop which provides very accurate resolution and can detect that the loop is converging while in the linear range of the phase detector. The circuit is composed of an AC coupled amplifier which receives signals from the phase locked loop sample and hold phase detector and provides a signal to a comparator network. The comparator network is comprised of two amplifiers whose outputs are in a wired AND configuration. The comparator amplifiers are referenced for the degree of lock required such that a voltage from the input amplifier which exceeds either the upper or lower reference voltage will produce a negative going pulse at the wired AND output circuit indicative of an out of lock condition.