Patents by Inventor Gerald Caracciolo

Gerald Caracciolo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9648320
    Abstract: Methods and system for processing data are disclosed. One method can comprise receiving content data in a first format and context description data relating to a portion of the content data. The method may further comprise converting the portion of the content data to an intermediate format, and converting the portion of the content data from the intermediate format to a second format based at least in part upon the context description data.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: May 9, 2017
    Assignee: Comcast Cable Communications, LLC
    Inventors: Arun V. Rajagopalan, Robert Gaydos, Gerald Caracciolo
  • Publication number: 20140240591
    Abstract: Methods and system for processing data are disclosed. One method can comprise receiving content data in a first format and context description data relating to a portion of the content data. The method may further comprise converting the portion of the content data to an intermediate format, and converting the portion of the content data from the intermediate format to a second format based at least in part upon the context description data.
    Type: Application
    Filed: February 22, 2013
    Publication date: August 28, 2014
    Applicant: Comcast Cable Communications, LLC
    Inventors: Arun V. Rajagopalan, Robert Gaydos, Gerald Caracciolo
  • Publication number: 20070091936
    Abstract: A rate generator for generating a plurality of different frequencies that represent video requests in a video on demand (VOD) system. The rate generator comprises a plurality of parallel groups, each group comprising a phase accumulator module having a plurality of phase accumulators, a phase increment model having a plurality of phase increment registers, and an adder, coupled to the phase accumulator module and the phase increment module. The adder sums the phase increment value from the phase from the phase increment module and the output of the phase accumulator module and provides the value back to the phase accumulator module. When the sum reaches a pre-determined value, the adder resets and generates a pulse at a frequency dependent on the phase increment and the sampling frequency. In addition, a method for deriving the rate generator architecture is also provided.
    Type: Application
    Filed: October 24, 2006
    Publication date: April 26, 2007
    Inventors: Gerald Caracciolo, Steven Zack