Patents by Inventor Gerald Girard

Gerald Girard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Phosphate transport inhibitors
    Publication number: 20030216449
    Abstract: N-Aryl-2-sulfonamidobenzamides, useful for treatment of chronic renal failure and uremic bone disease, are disclosed.
    Type: Application
    Filed: November 8, 2002
    Publication date: November 20, 2003
    Inventors: Joseph Weinstock, Gerald Girard, Dimitri Gaitanopoulos
  • Method and apparatus for removing particulates from semiconductor substrates in plasma processing chambers
    Patent number: 6214160
    Abstract: An electrostatic technique for removing particulate matter from a semiconductor wafer in a plasma processing chamber, such as a plasma-enhanced chemical vapor deposition (PECVD) chamber. During a particulate removal phase of operation, a normally grounded electrode that supports the wafer is temporarily isolated from ground and a bias voltage generator is simultaneously connected to the electrode, supplying sufficient bias voltage to electrostatically launch particulates from the surface of the wafer. A plasma formed above the normally grounded electrode is maintained during the particulate removal phase, and particulates launched from the wafer become suspended in a sheath region surrounding the plasma, from where they can be later removed by a purging flow of gas. Preferably, the bias voltage generator provides a bias voltage that alternates in polarity, to ensure removal of both positively-charged and negatively charged particles from the wafer surface.
    Type: Grant
    Filed: May 7, 1998
    Date of Patent: April 10, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Charles Dornfest, Anand Gupta, Gerald Girard
  • Method and apparatus for removing particulates from semiconductor substrates in plasma processing chambers
    Patent number: 5779807
    Abstract: An electrostatic technique for removing particulate matter from a semiconductor wafer in a plasma processing chamber, such as a plasma-enhanced chemical vapor deposition (PECVD) chamber. During a particulate removal phase of operation, a normally grounded electrode that supports the wafer is temporarily isolated from ground and a bias voltage generator is simultaneously connected to the electrode, supplying sufficient bias voltage to electrostatically launch particulates from the surface of the wafer. A plasma formed above the normally grounded electrode is maintained during the particulate removal phase, and particulates launched from the wafer become suspended in a sheath region surrounding the plasma, from where they can be later removed by a purging flow of gas. Preferably, the bias voltage generator provides a bias voltage that alternates in polarity, to ensure removal of both positively-charged and negatively charged particles from the wafer surface.
    Type: Grant
    Filed: October 29, 1996
    Date of Patent: July 14, 1998
    Assignee: Applied Materials, Inc.
    Inventors: Charles Dornfest, Anand Gupta, Gerald Girard