Patents by Inventor Gerald Hodits

Gerald Hodits has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Parallel processing for decoding and cyclic redundancy checking for the reception of mobile radio signals
    Patent number: 7461324
    Abstract: Depending on the sequence of the decoded payload signal bits (am1, . . . , amA) and redundancy checking bits (pm1, . . . , pmL) which are produced by the Viterbi traceback, either some of these bits are inserted by means of a distribution device (1) from the front into a linear feedback shift register (10), or some of these bits are inserted by means of the distribution device (1) from the rear into a linear feedback shift register (10), or all of them are inserted into a linear feedback shift register (20) from the rear with the allocated coefficients being unchanged, or all of them are inserted into a shift register from the front with the allocated coefficients being inverted. This allows a redundancy checking process to be carried out on a transmitted data block in the shift register (10; 20) without temporary storage of the bits produced by the decoding process.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: December 2, 2008
    Assignee: Infineon Technologies
    Inventors: Jens Berkmann, Wolfgang Haas, Thomas Herndl, Gerald Hodits, Armin Häutle, Sasha Simeunovic
  • Parallel processing for decoding and cyclic redundancy checking for the reception of mobile radio signals
    Publication number: 20050229075
    Abstract: Depending on the sequence of the decoded payload signal bits (am1, . . . , amA) and redundancy checking bits (pm1, . . . , pmL) which are produced by the Viterbi traceback, either some of these bits are inserted by means of a distribution device (1) from the front into a linear feedback shift register (10), or some of these bits are inserted by means of the distribution device (1) from the rear into a linear feedback shift register (10), or all of them are inserted into a linear feedback shift register (20) from the rear with the allocated coefficients being unchanged, or all of them are inserted into a shift register from the front with the allocated coefficients being inverted. This allows a redundancy checking process to be carried out on a transmitted data block in the shift register (10; 20) without temporary storage of the bits produced by the decoding process.
    Type: Application
    Filed: February 23, 2005
    Publication date: October 13, 2005
    Inventors: Jens Berkmann, Wolfgang Haas, Thomas Herndl, Gerald Hodits, Armin Hautle, Sasha Simeunovic