Patents by Inventor Gerald J. D'Amato

Gerald J. D'Amato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for providing an integrated circuit package with an alignment mechanism
    Patent number: 6872592
    Abstract: An integrated circuit package is provided with an alignment mechanism by 1) heating a wetting media that has been applied to a number of annular ring shaped alignment pads provided on the integrated circuit package, at known locations with respect to a pattern of contacts pads that is provided on the integrated circuit package, and then 2) while the wetting media is heated, attaching a number of alignment balls or alignment bullets to the annular ring shaped alignment pads.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: March 29, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Gerald J. D'Amato, Sari K. Christensen, Nicole Butel
  • Methods for providing an integrated circuit package with an alignment mechanism
    Publication number: 20040089880
    Abstract: An integrated circuit package is provided with an alignment mechanism by 1) heating a wetting media that has been applied to a number of annular ring shaped alignment pads provided on the integrated circuit package, at known locations with respect to a pattern of contacts pads that is provided on the integrated circuit package, and then 2) while the wetting media is heated, attaching a number of alignment balls or alignment bullets to the annular ring shaped alignment pads.
    Type: Application
    Filed: October 30, 2003
    Publication date: May 13, 2004
    Inventors: Gerald J. D'Amato, Sari K. Christensen, Nicole Butel
  • Apparatus for aligning an integrated circuit package with an interface
    Patent number: 6724095
    Abstract: An integrated circuit package is provided with alignment pads which are solid or annular ring shaped. Alignment members such as balls or bullets are attached to the alignment pads via a wetting media. When heated, the wetting media serves to center and seat the alignment members on the alignment pads. When cooled, the wetting media serves to bond the alignment members to the alignment pads.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: April 20, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Gerald J. D'Amato, Sari K. Christensen, Nicole Butel
  • Methods and apparatus for aligning an integrated circuit package with an interface
    Publication number: 20030020179
    Abstract: An integrated circuit package is provided with alignment pads which are solid or annular ring shaped. Alignment members such as balls or bullets are attached to the alignment pads via a wetting media. When heated, the wetting media serves to center and seat the alignment members on the alignment pads. When cooled, the wetting media serves to bond the alignment members to the alignment pads.
    Type: Application
    Filed: July 25, 2001
    Publication date: January 30, 2003
    Inventors: Gerald J. D'Amato, Sari K. Christensen, Nicole Butel
  • Hybrid BGA and QFP chip package assembly and process for same
    Publication number: 20010022397
    Abstract: The present invention provides a hybrid chip package that utilizes a high-speed BGA structure and a plurality of flexible and reliable QFP leads. More specifically, the QFP leads are attached to a peripheral region of a substrate to surround the attached BGA structure and replace solder bumps of a conventional BGA structure that would typically flack or crack during operational cycles to create an electrical open between the conventional BGA package and the attached printed circuit board.
    Type: Application
    Filed: May 22, 2001
    Publication date: September 20, 2001
    Inventors: Susan K. Radford, Gerald J. D'Amato
  • Hybrid BGA and QFP chip package assembly and process for same
    Patent number: 6261869
    Abstract: The present invention provides a hybrid chip package that utilizes a high-speed BGA structure and a plurality of flexible and reliable QFP leads. More specifically, the QFP leads are attached to a peripheral region of a substrate to surround the attached BGA structure and replace solder bumps of a conventional BGA structure that would typically flack or crack during operational cycles to create an electrical open between the conventional BGA package and the attached printed circuit board.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: July 17, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Susan K. Radford, Gerald J. D'Amato