Patents by Inventor Gerald K. Bartley

Gerald K. Bartley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11177595
    Abstract: Disclosed aspects relate to connector structures and a card. A first connector structure is to join a first subset of a set of electrical connections. A second connector structure is to join a second subset of the set of electrical connections. The card manages the set of electrical connections and is located between the first and second connector structures to connect with the first and second connector structures.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: November 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
  • Patent number: 11080222
    Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: August 3, 2021
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
  • Patent number: 11061846
    Abstract: A security matrix layer between a first and second conductive shorting layers are located within a printed circuit board (PCB). The security matrix layer includes at least two types of microcapsules with each type of microcapsule containing a different reactant. When the security matrix layer is accessed, drilled, or otherwise damaged, the microcapsules rupture and the reactants react to form at least an electrically conductive material. The electrically conductive material may contact and short the first and second conductive shorting layers.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: July 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Joseph Kuczynski, Timothy J. Tofil
  • Patent number: 10715337
    Abstract: A conductor on glass security layer may be located within a printed circuit board (PCB) of a crypto adapter card or within a daughter card upon the crypto adapter card. The conductor on glass security layer includes a glass dielectric layer that remains intact in the absence of point force loading and shatters when a point load punctures or otherwise contacts the glass dielectric layer. The conductor on glass security layer also includes a conductive security trace upon the glass dielectric layer. A physical access attempt shatters a majority of the glass dielectric layer, which in turn fractures the security trace. A monitoring circuit that monitors the resistance of the conductive security trace detects the resultant open circuit or change in security trace resistance and initiates a tamper signal that which may be received by one or more computer system devices to respond to the unauthorized attempt of physical access.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: July 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
  • Patent number: 10657290
    Abstract: Systems and methods to safeguard data and hardware may include a memory configured to store a first image and sensitive data, and an optical sensor configured to capture a second image. A sensor signal comprising the captured second image may be generated. A controller having access to the memory may be configured to receive the sensor signal. The controller may be further configured to compare the stored first image to the captured second image, and based on the comparison, to determine whether the sensitive data is accessible.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: May 19, 2020
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson
  • Publication number: 20200125522
    Abstract: A security matrix layer between a first and second conductive shorting layers are located within a printed circuit board (PCB). The security matrix layer includes at least two types of microcapsules with each type of microcapsule containing a different reactant. When the security matrix layer is accessed, drilled, or otherwise damaged, the microcapsules rupture and the reactants react to form at least an electrically conductive material. The electrically conductive material may contact and short the first and second conductive shorting layers.
    Type: Application
    Filed: December 5, 2018
    Publication date: April 23, 2020
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Joseph Kuczynski, Timothy J. Tofil
  • Patent number: 10622316
    Abstract: An apparatus comprises a plurality of conductive elements arranged within at least a first conductive layer and a dielectric layer comprising a plurality of microcapsules. The first conductive layer is arranged on a first side of the dielectric layer. The apparatus further comprises monitoring circuitry coupled with the plurality of conductive elements and configured to detect a change in an electrical parameter for at least a first conductive element of the plurality of conductive elements. The change in the electrical parameter indicates a physical intrusion of the dielectric layer that causes a rupture of one or more microcapsules of the plurality of microcapsules.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: April 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Joseph Kuczynski
  • Patent number: 10559902
    Abstract: Disclosed aspects relate to connector structures and a card. A first connector structure is to join a first subset of a set of electrical connections. A second connector structure is to join a second subset of the set of electrical connections. The card manages the set of electrical connections and is located between the first and second connector structures to connect with the first and second connector structures.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: February 11, 2020
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
  • Patent number: 10548216
    Abstract: In some embodiments, a tamper-respondent system includes a PCB having a coating on a surface thereof, wherein the coating includes spinel-based, non-conductive metal oxide mixed into a non-conductive supporting material. The tamper-respondent system also includes a conductive track writing unit, a sensor, and an enclosure substantially enclosing the PCB, conductive track writing unit, and sensor. Responsive to a determination that a signal output from the sensor is indicative of tampering, the conductive track writing unit writes a conductive track within a predetermined portion of the coating by irradiating the predetermined portion of the coating to reduce the spinel-based, non-conductive metal oxide in the predetermined portion of the coating to metal nuclei. In some embodiments, the conductive track may modify circuit paths of the PCB and/or create electrical features on the PCB detectable by monitoring agents.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: January 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson
  • Patent number: 10547640
    Abstract: A security matrix layer between a first and second conductive shorting layers are located within a printed circuit board (PCB). The security matrix layer includes at least two types of microcapsules with each type of microcapsule containing a different reactant. When the security matrix layer is accessed, drilled, or otherwise damaged, the microcapsules rupture and the reactants react to form at least an electrically conductive material. The electrically conductive material may contact and short the first and second conductive shorting layers.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: January 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Joseph Kuczynski, Timothy J. Tofil
  • Publication number: 20200028695
    Abstract: A conductor on glass security layer may be located within a printed circuit board (PCB) of a crypto adapter card or within a daughter card upon the crypto adapter card. The conductor on glass security layer includes a glass dielectric layer that remains intact in the absence of point force loading and shatters when a point load punctures or otherwise contacts the glass dielectric layer. The conductor on glass security layer also includes a conductive security trace upon the glass dielectric layer. A physical access attempt shatters a majority of the glass dielectric layer, which in turn fractures the security trace. A monitoring circuit that monitors the resistance of the conductive security trace detects the resultant open circuit or change in security trace resistance and initiates a tamper signal that which may be received by one or more computer system devices to respond to the unauthorized attempt of physical access.
    Type: Application
    Filed: November 13, 2017
    Publication date: January 23, 2020
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
  • Publication number: 20200026680
    Abstract: A security matrix layer between a first and second conductive shorting layers are located within a printed circuit board (PCB). The security matrix layer includes at least two types of microcapsules with each type of microcapsule containing a different reactant. When the security matrix layer is accessed, drilled, or otherwise damaged, the microcapsules rupture and the reactants react to form at least an electrically conductive material. The electrically conductive material may contact and short the first and second conductive shorting layers.
    Type: Application
    Filed: December 5, 2018
    Publication date: January 23, 2020
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Joseph Kuczynski, Timothy J. Tofil
  • Publication number: 20190386414
    Abstract: Disclosed aspects relate to connector structures and a card. A first connector structure is to join a first subset of a set of electrical connections. A second connector structure is to join a second subset of the set of electrical connections. The card manages the set of electrical connections and is located between the first and second connector structures to connect with the first and second connector structures.
    Type: Application
    Filed: August 29, 2019
    Publication date: December 19, 2019
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
  • Patent number: 10433431
    Abstract: A method and apparatus for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson
  • Publication number: 20190254176
    Abstract: A method and apparatus for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.
    Type: Application
    Filed: April 23, 2019
    Publication date: August 15, 2019
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson
  • Patent number: 10342142
    Abstract: A method and apparatus are provided for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: July 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson
  • Patent number: 10318462
    Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: June 11, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
  • Patent number: 10303639
    Abstract: A method of fabricating a printed circuit board (PCB) is presented. The PCB includes a glass security layer. The method includes forming the glass security layer upon a PCB wiring layer. The method includes optically attaching an optical electromagnetic radiation (EM) emitter upon the glass security layer. The method includes optically attaching an optical EM receiver upon the glass security layer. The method further includes electrically connecting an optical monitor device to the optical EM receiver.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: May 28, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
  • Patent number: 10224410
    Abstract: Embodiments herein describe a through-substrate via formed in a semiconductor substrate that includes a transistor. In one embodiment, the through-substrate via includes a BJT which includes different doped semiconductor layers that form a collector, a base, and an emitter. The through-substrate via can also include metal contacts to the collector, base, and emitter which enable the through-substrate via to be coupled to a metal routing layer or a solder bump.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, David P. Paulsen, John E. Sheets, II
  • Publication number: 20190037709
    Abstract: A method and apparatus are provided for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.
    Type: Application
    Filed: July 28, 2017
    Publication date: January 31, 2019
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson