Patents by Inventor Gerald Leake
Gerald Leake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12449593Abstract: There is set forth herein a method including fabricating a photonics structure having one or more photonics device. The method can include forming one or more conductive material formation for communicating electrical signals to and/or from the one or more photonics device.Type: GrantFiled: April 16, 2020Date of Patent: October 21, 2025Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORKInventors: Douglas Coolbaugh, Gerald Leake
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Patent number: 11841531Abstract: There is set forth herein an optoelectrical device, comprising: a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, a photonics device dielectric stack, and a bond layer that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack. There is set forth herein a method comprising building an interposer base structure on a first wafer having a first substrate, including fabricating a plurality of through vias in the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layers; and building a photonics structure on a second wafer having a second substrate, including fabricating one or more photonics devices within a photonics device dielectric stack formed on the second substrate.Type: GrantFiled: July 29, 2022Date of Patent: December 12, 2023Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORKInventors: Douglas Coolbaugh, Douglas La Tulipe, Gerald Leake
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Publication number: 20220381974Abstract: There is set forth herein an optoelectrical device, comprising: a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, a photonics device dielectric stack, and a bond layer that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack. There is set forth herein a method comprising building an interposer base structure on a first wafer having a first substrate, including fabricating a plurality of through vias in the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layers; and building a photonics structure on a second wafer having a second substrate, including fabricating one or more photonics devices within a photonics device dielectric stack formed on the second substrate.Type: ApplicationFiled: July 29, 2022Publication date: December 1, 2022Applicant: The Research Foundation for The State University of New YorkInventors: Douglas COOLBAUGH, Douglas LA TULIPE, Gerald LEAKE
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Patent number: 11435523Abstract: There is set forth herein an optoelectrical system comprising: a conductive path for supplying an input voltage to a photonics device, wherein the conductive path comprises a base structure through via extending through a substrate and a photonics structure through via, the photonics structure through via extending through a photonics device dielectric stack. There is set forth herein an optoelectrical system comprising: a second structure fusion bonded to an interposer base dielectric stack of a first structure. There is set forth herein a method comprising: fabricating a second wafer built structure using a second wafer, the second wafer built structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second wafer based structure; and wafer scale bonding the second wafer built structure to a first wafer built structure.Type: GrantFiled: June 23, 2020Date of Patent: September 6, 2022Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORKInventors: Douglas Coolbaugh, Douglas La Tulipe, Gerald Leake
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Publication number: 20220229228Abstract: There is set forth herein a method including fabricating a photonics structure having one or more photonics device. The method can include forming one or more conductive material formation for communicating electrical signals to and/or from the one or more photonics device.Type: ApplicationFiled: April 16, 2020Publication date: July 21, 2022Applicant: The Research Foundation for the State University of New YorkInventors: Douglas COOLBAUGH, Gerald LEAKE
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Publication number: 20200319403Abstract: There is set forth herein an optoelectrical system comprising: a conductive path for supplying an input voltage to a photonics device, wherein the conductive path comprises a base structure through via extending through a substrate and a photonics structure through via, the photonics structure through via extending through a photonics device dielectric stack. There is set forth herein an optoelectrical system comprising: a second structure fusion bonded to an interposer base dielectric stack of a first structure. There is set forth herein a method comprising: fabricating a second wafer built structure using a second wafer, the second wafer built structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second wafer based structure; and wafer scale bonding the second wafer built structure to a first wafer built structure.Type: ApplicationFiled: June 23, 2020Publication date: October 8, 2020Inventors: Douglas COOLBAUGH, Douglas LA TULIPE, Gerald LEAKE
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Patent number: 10698156Abstract: There is set forth herein a method including building an interposer base structure on a first wafer having a first substrate, wherein the building an interposer base structure includes fabricating a plurality of through vias that extend through the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layer; building a photonics structure on a second wafer having a second substrate, wherein the building a photonics structure includes fabricating within a photonics device dielectric stack formed on the second substrate one or more photonics device; and bonding the photonics structure to the interposer base structure to define an interposer having the interposer base structure and one or more photonics device fabricated within the photonics device dielectric stack.Type: GrantFiled: February 8, 2018Date of Patent: June 30, 2020Assignee: The Research Foundation for the State University of New YorkInventors: Douglas Coolbaugh, Douglas La Tulipe, Gerald Leake
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Publication number: 20180314003Abstract: There is set forth herein a method including building an interposer base structure on a first wafer having a first substrate, wherein the building an interposer base structure includes fabricating a plurality of through vias that extend through the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layer; building a photonics structure on a second wafer having a second substrate, wherein the building a photonics structure includes fabricating within a photonics device dielectric stack formed on the second substrate one or more photonics device; and bonding the photonics structure to the interposer base structure to define an interposer having the interposer base structure and one or more photonics device fabricated within the photonics device dielectric stack.Type: ApplicationFiled: February 8, 2018Publication date: November 1, 2018Inventors: Douglas Coolbaugh, Douglas La Tulipe, JR., Gerald Leake
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Patent number: 9874693Abstract: A semiconductor structure can include an active device FET region having a FET and a photonics region having a photonic device including a waveguide. A semiconductor structure can include an active device FET region having a FET and a trench isolation region having a photonic device that includes a waveguide. A method can include forming a FET at an active device FET region of a semiconductor structure. A method can include forming a photonic device at a trench isolation region of a semiconductor structure.Type: GrantFiled: June 10, 2015Date of Patent: January 23, 2018Assignee: The Research Foundation for the State University of New YorkInventors: Christopher Baiocco, Douglas Coolbaugh, Gerald Leake
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Publication number: 20160363729Abstract: A semiconductor structure can include an active device FET region having a FET and a photonics region having a photonic device including a waveguide. A semiconductor structure can include an active device FET region having a FET and a trench isolation region having a photonic device that includes a waveguide. A method can include forming a FET at an active device FET region of a semiconductor structure. A method can include forming a photonic device at a trench isolation region of a semiconductor structure.Type: ApplicationFiled: June 10, 2015Publication date: December 15, 2016Inventors: Christopher Baiocco, Douglas Coolbaugh, Gerald Leake
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Publication number: 20080124859Abstract: Methods of forming field effect transistors include methods of forming PMOS and NMOS transistors by forming first and second gate electrodes on a substrate and then forming an electrically insulating layer having etch-enhancing impurities therein, on the first and second gate electrodes. The electrically insulating layer may be formed as a boron-doped silicon nitride layer or an electrically insulating layer that is doped with germanium and/or fluorine. The electrically insulating layer is etched-back to define first sidewall spacers on the first gate electrode and second sidewall spacers on the second gate electrode. P-type source and drain region dopants are then implanted into the semiconductor substrate, using the first sidewall spacers as a first implant mask. The second sidewall spacers on the second gate electrode are then etched back to reduce their lateral dimensions.Type: ApplicationFiled: November 27, 2006Publication date: May 29, 2008Inventors: Min Chul Sun, Jong Ho Yang, Young Gun Ko, Ja Hum Ku, Jae Eon Park, Jeong Hwan Yang, Christopher Vincent Baiocco, Gerald Leake