Abstract: Described herein are features related to a bus based timed input output module (TIO) for use in control systems of physical systems, particularly where the physical systems are safety critical systems. When the TIO is powered on, one or more operations are performed by the TIO, wherein the one or more operations, when performed by the TIO: 1) cause the TIO to be non-functional, thereby preventing the TIO from improperly or accidentally activating a Component in communication with the TIO; 2) clears the TIO of previous operations (if any); and 3) facilitates compatibility of the TIO with an arbitrary Component.

Abstract: A communications protocol that is designed for transmission of data in networks that are subjected to harsh conditions is described herein. A network includes a plurality of devices, where the devices comprise respective nodes. The nodes are in communication with one another by way of a central network hub. The protocol causes the nodes to transmit data over a network bus at different data rates depending upon whether the nodes are operating normally or an arbitration procedure has been invoked.

Abstract: The various technologies presented herein relate to generating copies of an incoming signal, wherein each copy of the signal can undergo different processing to facilitate control of bandwidth demands during communication of one or more signals relating to the incoming signal. A signal sharing component can be utilized to share copies of the incoming signal between a plurality of circuits/components which can include a first A/D converter, a second A/D converter, and a comparator component. The first A/D converter can operate at a low sampling rate and accordingly generates, and continuously transmits, a signal having a low bandwidth requirement. The second A/D converter can operate at a high sampling rate and hence generates a signal having a high bandwidth requirement. Transmission of a signal from the second A/D converter can be controlled by a signaling event (e.g., a signal pulse) being determined to have occurred by the comparator component.