Patents by Inventor Gerald N. Shapiro

Gerald N. Shapiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4462029
    Abstract: A system for reducing a fixed number of data buses and connections in a computer system having a number of modules connected to the data bus utilizing the internal circuits of the various processing units or modules to transmit data from one unit to another via the data bus when the normal function of a unit can be interrupted, with the data routing and module control being under the control of a command bus.
    Type: Grant
    Filed: December 6, 1979
    Date of Patent: July 24, 1984
    Assignee: Analogic Corporation
    Inventors: Leopold Neumann, Gerald N. Shapiro, Bruno A. Mattedi
  • Patent number: 4298936
    Abstract: In an Array Processor, a buffering unit including a FIFO buffer and serial-to-parallel converter, is interposed between a control processor and the remainder of the Array Processing circuitry so as to permit the utilization of a vertical instruction set for generating addresses and function numbers which are then serially coupled from the control processor to the buffering unit.
    Type: Grant
    Filed: November 15, 1979
    Date of Patent: November 3, 1981
    Assignee: Analogic Corporation
    Inventor: Gerald N. Shapiro
  • Patent number: 4158888
    Abstract: A signal processor for use in a small, lightweight radar-guided missile to provide a discrete Fast Fourier Transform (FFT) on received radar return signals. The radar return signal are converted into a sequence of binary digits enabling a simple decoder to perform complex addition and subtraction processing, thereby minimizing the space and complexity of the signal processor.
    Type: Grant
    Filed: October 14, 1977
    Date of Patent: June 19, 1979
    Assignee: Raytheon Company
    Inventors: Gerald N. Shapiro, Bertram J. Goldstone, Joseph D. Simone, Edward E. Spignese
  • Patent number: 4075630
    Abstract: A signal processor for use in a small, lightweight radar-guided missile to provide a discrete Fast Fourier Transform (FFT) on received radar return signals. The radar return signals are converted into a sequence of binary digits enabling a simple decoder to perform complex addition and subtraction processing, thereby minimizing the space and complexity of the signal processor.
    Type: Grant
    Filed: September 1, 1976
    Date of Patent: February 21, 1978
    Assignee: Raytheon Company
    Inventors: Gerald N. Shapiro, Bertram J. Goldstone, Joseph D. Simone, Edward E. Spignese