Patents by Inventor Gerald R. Larsen

Gerald R. Larsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5633522
    Abstract: The present invention is directed to a unique silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion such that a cross section of the gate appears as an inverted "T". A Cl.sub.2 /O.sub.2 plasma etch is used to etch the CVD tungsten layer and a chemical etch is used to etch the sputtered tungsten layer to form the gate electrode. It has been discovered that sputtered tungsten is more resistant to Cl.sub.2 /O.sub.2 reactive ion etch than is CVD tungsten. The sputtered tungsten layer acts as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: May 27, 1997
    Assignee: International Business Machines Corporation
    Inventors: Fernand Dorleans, Liang-Choo Hsia, Louis L. C. Hsu, Gerald R. Larsen, Geraldine C. Schwartz
  • Patent number: 5599725
    Abstract: The present invention is directed to a unique method for fabricating a silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion such that a cross section of the gate appears as an inverted "T". A Cl.sub.2 /O.sub.2 plasma etch is used to etch the CVD tungsten layer and a chemical etch is used to etch the sputtered tungsten layer to form the gate electrode. It has been discovered that sputtered tungsten is more resistant to Cl.sub.2 /O.sub.2 reactive ion etch than is CVD tungsten. The sputtered tungsten layer acts as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process.
    Type: Grant
    Filed: November 22, 1994
    Date of Patent: February 4, 1997
    Assignee: International Business Machines Corporation
    Inventors: Fernand Dorleans, Liang-Choo Hsia, Louis L. C. Hsu, Gerald R. Larsen, Geraldine C. Schwartz
  • Patent number: 5340775
    Abstract: A SiCr microfuse, deletable either by electrical voltage pulses or by laser pulses, for rerouting the various components in an integrated circuit, as where redundancy in array structures is implemented, and the method of fabricating same, at any wiring level of the chip, by utilizing a direct resist masking of the SiCr fuse layer to eliminate problems of mask damage and residual metal adjacent the fuse.
    Type: Grant
    Filed: November 9, 1993
    Date of Patent: August 23, 1994
    Assignee: International Business Machines Corporation
    Inventors: Roy A. Carruthers, Fernand J. Dorleans, John A. Fitzsimmons, Richard Flitsch, James A. Jubinsky, Gerald R. Larsen, Geraldine C. Schwartz, Paul J. Tsang, Robert W. Zielinski
  • Patent number: 5285099
    Abstract: A SiCr microfuse, deletable either by electrical voltage pulses or by laser pulses, for rerouting the various components in an integrated circuit, as where redundancy in array structures is implemented, and the method of fabricating same, at any wiring level of the chip, by utilizing a direct resist masking of the SiCr fuse layer to eliminate problems of mask damage and residual metal adjacent the fuse.
    Type: Grant
    Filed: December 15, 1992
    Date of Patent: February 8, 1994
    Assignee: International Business Machines Corporation
    Inventors: Roy A. Carruthers, Fernand J. Dorleans, John A. Fitzsimmons, Richard Flitsch, James A. Jubinsky, Gerald R. Larsen, Geraldine C. Schwartz, Paul J. Tsang, Robert W. Zielinski