Abstract: An on chip field effect transistor circuit is disclosed for electrically compensating for variations in process parameters which have occurred during the course of fabrication of the integrated circuit chip as well as variations in environmental parameters such as supply voltages and temperature. The compensation is performed by utilizing three field effect transistor devices on the integrated semiconductor chip as a sensor to detect variations in the characteristics of the devices due to deviations in the process parameters during fabrication thereof. The sensing field effect transistors operate in a circuit to adjust the gate potential of FET load devices in those functional circuits on the integrated circuit chip whose sensitivity to the variations in the process parameters is critical to the operation of the circuit as a whole.