Patents by Inventor Gerard Bouisse

Gerard Bouisse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11050389
    Abstract: Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: June 29, 2021
    Assignee: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
    Inventors: Christian Cassou, Gerard Bouisse
  • Publication number: 20210013836
    Abstract: Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.
    Type: Application
    Filed: April 24, 2017
    Publication date: January 14, 2021
    Applicant: MACOM Technology Solutions Holdings, Inc.
    Inventors: Gerard Bouisse, Christian Cassou
  • Publication number: 20210013835
    Abstract: Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.
    Type: Application
    Filed: April 24, 2017
    Publication date: January 14, 2021
    Applicant: MACOM Technology Solutions Holdings, Inc.
    Inventors: Christian Cassou, Gerard Bouisse
  • Publication number: 20200382069
    Abstract: Apparatus and methods for an improved-efficiency Doherty amplifier are described. The Doherty amplifier may include a two-stage peaking amplifier that transitions from an “off” state to an “on” state later and more rapidly than a single-stage peaking amplifier used in a conventional Doherty amplifier. The improved Doherty amplifier may operate at higher gain values than a conventional Doherty amplifier, with no appreciable reduction in signal bandwidth.
    Type: Application
    Filed: April 24, 2017
    Publication date: December 3, 2020
    Applicant: MACOM Technology Solutions Holdings, Inc.
    Inventor: Gerard Bouisse
  • Publication number: 20200259461
    Abstract: Apparatus and methods for a multiclass, broadband, no-load-modulation power amplifier are described. The power amplifier (500) may include a main amplifier (532) operating in a first amplification class and a plurality of peaking amplifiers (536, 537, 538) operating in a second amplification class. The main amplifier (532) and peaking amplifiers (536, 537, 538) may operate in parallel on portions of signals derived from an input signal to be amplified. The main amplifier (532) may see no modulation of its load impedance between a fully-on state of the power amplifier (all amplifiers amplifying) and a fully backed-off state (peaking amplifiers idle). By avoiding load modulation, the power amplifier (500) can exhibit improved bandwidth and efficiency compared to conventional Doherty amplifiers.
    Type: Application
    Filed: October 2, 2017
    Publication date: August 13, 2020
    Applicant: MACOM Technology Solutions Holding Inc.
    Inventor: Gerard Bouisse
  • Publication number: 20200212847
    Abstract: Apparatus and methods for a no-load-modulation power amplifier are described. No-load-modulation power amplifiers can comprise multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see essentially no modulation of its load between the power amplifier's fully-on and fully backed-off states. The power amplifiers can operate in symmetric and asymmetric modes. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained. Further improvements can be obtained by combining signals from the amplifiers with hybrid couplers.
    Type: Application
    Filed: August 14, 2018
    Publication date: July 2, 2020
    Applicant: MACOM Technology Solutions Holdings, Inc.
    Inventors: Bi Ngoc Pham, Gerard Bouisse
  • Publication number: 20200112287
    Abstract: Apparatus and methods for a low-load-modulation power amplifier are described. Low-load-modulation power amplifiers can include multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see low modulation of its load between the power amplifier's fully-on and fully backed-off states. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained.
    Type: Application
    Filed: October 4, 2019
    Publication date: April 9, 2020
    Applicant: MACOM Technology Solutions Holdings, Inc.
    Inventors: Bi Ngoc Pham, Gerard Bouisse
  • Publication number: 20190356277
    Abstract: Apparatus and methods for a modified Doherty amplifier operating at gigahertz frequencies are described. The combining of signals from a main amplifier and a peaking amplifier occur prior to impedance matching of the amplifier's output to a load. An integrated distributed inductor may be used in an impedance inverter to combine the signals. A size of the impedance element can be selected by patterning during manufacture to tune the amplifier and to allow power scaling for the amplifier.
    Type: Application
    Filed: August 2, 2019
    Publication date: November 21, 2019
    Applicant: MACOM Technology Solutions Holdings, Inc.
    Inventors: Gerard Bouisse, Andrew Alexander, Andrew Patterson
  • Patent number: 10038407
    Abstract: A die is described comprising at least one 3-way Doherty amplifier comprising a main stage, a first peak stage and a second peak stage. An input is connected to an input network which is connected to the main stage, first peak stage and second peak stage. The input network includes a first impedance connected to an input of the first peak stage and providing a ?90° phase shift and a second impedance connected to an input of the second peak stage and providing a 90° phase shift. An output is connected to an output network which is connected to the main stage, first peak stage and second peak stage. The output network includes a third impedance connected to the output of the first peak stage and providing a 180° phase shift and a fourth impedance connected to the output of the main stage and providing a 90° phase shift.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: July 31, 2018
    Assignee: Ampleon Netherlands B.V.
    Inventors: Xavier Moronval, Jean-Jacques Bouny, Gerard Bouisse
  • Publication number: 20170230009
    Abstract: A die is described comprising at least one 3-way Doherty amplifier comprising a main stage, a first peak stage and a second peak stage. An input is connected to an input network which is connected to the main stage, first peak stage and second peak stage. The input network includes a first impedance connected to an input of the first peak stage and providing a ?90° phase shift and a second impedance connected to an input of the second peak stage and providing a 90° phase shift. An output is connected to an output network which is connected to the main stage, first peak stage and second peak stage. The output network includes a third impedance connected to the output of the first peak stage and providing a 180° phase shift and a fourth impedance connected to the output of the main stage and providing a 90° phase shift.
    Type: Application
    Filed: August 7, 2015
    Publication date: August 10, 2017
    Inventors: Xavier Moronval, Jean-Jacques Bouny, Gerard Bouisse
  • Patent number: 9577585
    Abstract: A Doherty amplifier for amplifying an input signal to an output signal, the Doherty amplifier comprising: a main amplifier for receiving a first signal and for amplifying the first signal to generate a first amplified signal; a first peak amplifier for receiving a second signal and for generating a second amplified signal, the first peak amplifier only operating when the second signal has reached a first threshold power, the first and second signal split from the input signal; and output circuitry to combine the first and second amplified signals to generate an output signal having an operating bandwidth, the output circuitry comprising inductors arranged in the format of a branch line coupler, the inductors coupled to the output parasitic capacitances of the main and peak amplifier.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: February 21, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventors: Xavier Moronval, Jean-Jacques Bouny, Gerard Bouisse
  • Publication number: 20150295542
    Abstract: A Doherty amplifier for amplifying an input signal to an output signal, the Doherty amplifier comprising: a main amplifier for receiving a first signal and for amplifying the first signal to generate a first amplified signal; a first peak amplifier for receiving a second signal and for generating a second amplified signal, the first peak amplifier only operating when the second signal has reached a first threshold power, the first and second signal split from the input signal; and output circuitry to combine the first and second amplified signals to generate an output signal having an operating bandwidth, the output circuitry comprising inductors arranged in the format of a branch line coupler, the inductors coupled to the output parasitic capacitances of the main and peak amplifier.
    Type: Application
    Filed: March 25, 2015
    Publication date: October 15, 2015
    Inventors: Xavier Moronval, Jean-Jacques Bouny, Gerard Bouisse
  • Patent number: 9041470
    Abstract: A semiconductor package device comprises a radio frequency power transistor having an output port operably coupled to a single de-coupling capacitance located within the semiconductor package device. The single de-coupling capacitance is arranged to provide both high frequency decoupling and low frequency decoupling of signals output from the radio frequency power transistor.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: May 26, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Gerard Bouisse
  • Patent number: 8552800
    Abstract: A semiconductor package device comprises a first amplifier block, at least one further amplifier block, and at least one differential inductance operably coupled between a first plurality of elements of the output of a first active component of the first amplifier block and a second plurality of elements of the output of a first active component of the at least one further amplifier block. The differential inductance is arranged such that a uniform inductance is provided between the first plurality of elements of the first active component of the first amplifier block and the second plurality elements of the second active component of the at least one further amplifier block.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: October 8, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Gerard Bouisse
  • Patent number: 8253495
    Abstract: A semiconductor package device comprises a first amplifier block, at least one further amplifier block operably coupled in parallel with the first amplifier block between a common input and a common output, and at least one stabilization network operably coupled between a node of the first amplifier block and a corresponding node of the at least one further amplifier block. The at least one stabilization network comprises an inductance operably coupled between the corresponding nodes of the first and at least one further amplifier blocks, and a capacitance operably coupling a mid-point of the inductance to a ground plane.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: August 28, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Gerard Bouisse
  • Publication number: 20120038421
    Abstract: A semiconductor package device comprises a first amplifier block, at least one further amplifier block, and at least one differential inductance operably coupled between a first plurality of elements of the output of a first active component of the first amplifier block and a second plurality of elements of the output of a first active component of the at least one further amplifier block. The differential inductance is arranged such that a uniform inductance is provided between the first plurality of elements of the first active component of the first amplifier block and the second plurality elements of the second active component of the at least one further amplifier block.
    Type: Application
    Filed: April 30, 2009
    Publication date: February 16, 2012
    Applicant: Freescale Semiconductor, Inc.
    Inventor: Gerard Bouisse
  • Publication number: 20110175680
    Abstract: A semiconductor package device comprises a first amplifier block, at least one further amplifier block operably coupled in parallel with the first amplifier block between a common input and a common output, and at least one stabilisation network operably coupled between a node of the first amplifier block and a corresponding node of the at least one further amplifier block. The at least one stabilisation network comprises an inductance operably coupled between the corresponding nodes of the first and at least one further amplifier blocks, and a capacitance operably coupling a mid-point of the inductance to a ground plane.
    Type: Application
    Filed: September 30, 2008
    Publication date: July 21, 2011
    Applicant: FREESCALE Semiconductor ,Inc.
    Inventor: Gerard Bouisse
  • Publication number: 20110031571
    Abstract: A semiconductor package device comprises a radio frequency power transistor having an output port operably coupled to a single de-coupling capacitance located within the semiconductor package device. The single de-coupling capacitance is arranged to provide both high frequency decoupling and low frequency decoupling of signals output from the radio frequency power transistor.
    Type: Application
    Filed: April 22, 2008
    Publication date: February 10, 2011
    Inventor: Gerard Bouisse