Abstract: A hand biometrics sensing device includes an array of sensing elements (12) defining a sensing area (11) over which a person's hand is placed and which has a first portion (14) in which the sensing elements are arranged to provide high resolution sensing suitable for sensing fingerprint patterns and a second portion (15) in which the sensing elements are arranged to provide lower resolution sensing suitable for sensing at least one other hand biometric characteristic, for example, hand geometry, finger length, width or inter-joint dimensions. The sensing elements, which may include sense electrodes (17) connected to switching devices (16) such as TFTs, are arrayed in rows and columns and addressed by peripheral drive circuits via sets of row and column address conductors (18, 20), resulting in a low-cost, compact device.

Abstract: An image sensor (39) comprises a plurality of pixels (10), each pixel comprising a light sensor element (12), wherein a sensor voltage across the element varying depending on the light incident on the element. First and second transistors (14,16) are connected in series between voltage supply lines (18,20). A gate voltage (Vg1) on the first transistor is dependent upon the sensor voltage so that the current flowing through the first transistor (14) is a function of the sensor voltage. The gate voltage (Vg2) of the second transistor is supplied by a feedback circuit (22,24,26) which provides that the current through the first and second transistors (14,16) is substantially equal. The output of the pixel (10) is the gate voltage (Vg2) of the second transistor (16). The image sensor design of the invention avoids the need for storage capacitors to provide pixel gain.

Abstract: A fingerprint sensing device comprises an array of capacitive type sense elements (12) each having a sense electrode (14) for forming, together with an overlying fingerprint portion, a capacitance and a transistor (16) connected between the sense electrode and first and second associated address conductors (18, 20). The transistor is arranged with its gate connected to the sense electrode such that, due to the effect of the capacitance and parasitic capacitances in the transistor, a selection signal applied to the first conductor (18) causes the transistor to be turned on or to be held off in the presence of a fingerprint valley or ridge overlying the sense electrode. Fast sampling of the transistor on/off currents produced in the second conductor (20) is possible and improved noise rejection and high signal to noise ratio is obtained. A further transistor (17) may be included in the sense element which is operable to remove any unwanted charge on the gate of the first-mentioned transistor.

Abstract: A portable electronic device (1) has a keypad for entering alphanumeric characters. Some of the keys include a fingerprint sensor (2) and for each of these keys a different character may be selected for entry by using a different finger. The device is provided with a reference set of fingerprints of the authorised user or users, so unauthorised users cannot enter characters. A high resolution fingerprint sensor may be used for validating a user for secure transactions, while a lower resolution sensor may be used for differentiating between a small number of fingerprints. Size and interconnection complexity can be minimised by providing fingerprint sensors that are smaller than a fingerprint, and entering a fingerprint by wiping a finger across the sensor.

Abstract: An electronic apparatus comprising a fingerprint sensing device (10) having an array of sensing elements (12) carried on a transparent substrate (35) for sensing capacitively the ridge pattern of a fingerprint placed over the array, in which the transparency of the device is utilised to provide additional capabilities. Thus, an optical sensing device (60) may be disposed beneath the device (10) to sense optically through the device a further biometric characteristic, or the presence, of the finger overlying the sensing element array. Substantial transparency can be afforded to the device by forming the sense electrodes (30) of the array from transparent conductive material. In products like mobile telephones, notebook computers, PDAs, smart cards or like portable electronic products of small size such as fingerprint sensing device can then advantageously be arranged overlying a display device with the display output being visible through the device.

Abstract: An image sensor (39) comprises a plurality of pixels (10), each pixel comprising a light sensor element (12), wherein a sensor voltage across the element varying depending on the light incident on the element. First and second transistors (14,16) are connected in series between voltage supply lines (18,20). A gate voltage (Vg1) on the first transistor is dependent upon the sensor voltage so that the current flowing through the first transistor (14) is a function of the sensor voltage. The gate voltage (Vg2) of the second transistor is supplied by a feedback circuit (22,24,26) which provides that the current through the first and second transistors (14,16) is substantially equal. The output of the pixel (10) is the gate voltage (Vg2) of the second transistor (16). The image sensor design of the invention avoids the need for storage capacitors to provide pixel gain.

Abstract: A fingerprint sensing device comprises an array of sense elements (12) which each include a sense electrode (33), providing in combination with an overlying fingerprint part a capacitance (35), and first and second diode devices (30, 31) connected respectively between the sense electrode and associated ones (18, 20) of first and second sets (e.g. row and column) address conductors. An address circuit (22, 24) connected to the address conductors biases the diode devices in a respective address period such that a potential is applied via the first address conductor and the first diode device to the sense electrode and thereafter stored charge, indicative of the capacitance, is transferred via the second diode device to the second address conductor. The device offers fast, reliable, scanning and can conveniently be implemented using thin film technology for low cost and compactness.

Abstract: A fingerprint sensing device comprises an array of sense elements (12) each of which includes a sense electrode (14) which together with an overlying fingerprint portion forms a capacitor (35). The capacitor is charged by operation of a first switching device (16) via a first address conductor (18). A second switching device (17) is then operated to transfer the charge on the sense electrode to a second address conductor (20) where it is sensed (24) and an output indicative of capacitance provided accordingly. Fast, reliable, scanning is achieved. A row and column array of sense elements is conveniently addressed using sets of row and column conductors (18, 20) and the device can readily be implemented using thin film devices, e.g. TFTs, as the switching devices on an insulating support and with integrated drive circuits.

Abstract: A large-area electronic device comprises an array (1) of device elements (2,3) coupled to row and column conductors (A and B). The column conductors (B) are arranged in groups, (e.g M, M+1, M+2), and a column multiplexer circuit (C) couples the column conductors (B) of a respective group to a respective common terminal (5). The present invention provides a compatible multiplexer circuit (C) for the array (1), the operation of the circuit (C) using electrical switching rather than optical switching. This multiplexer circuit (C) for each column conductor comprises a diode bridge (SD3 to SD6) and may include a clamping switch (SD1, SD2). A signal is transmitted between the column conductor (B) and a common output terminal (5) in a first state of the diode bridge (SD3 to SD6). The potential of the column conductor (B) is clamped by the clamping switch (SD1, SD2) in a second state of the diode bridge.

Abstract: A large-area electronic device such as, e.g, a large-area image sensor or flat panel display comprises thin-film drive circuitry including inverters each comprising a driver TFT (M1), a load TFT (M2) and a bootstrap capacitor (C.sub.s). Most TFT types which may be used to fabricate the transistors (M1 and M2) have a high parasitic gate capacitance due, inter alia, to overlap of the gate electrode (g) with their source and drain electrodes (21 and 22). This parasitic capacitance degrades the inverter gain Av by coupling between the output line (O/P) of the inverter and the gate electrode (g) of its load device (M2) and an excessively large capacitor (C.sub.s) is required to overcome this degradation. The present invention uses a reduction in the transconductance (gm2) of the load TFT (M2) to permit a reduction in the size of the boot strapping capacitor (C.sub.s) to within practical limits, while still obtaining a desirably high gain Av from the inverter in spite of the parasitic capacitances. A factor .mu..

Abstract: Thin-film circuit elements (M1,M2,M3,R) of a large-area electronic device such as an image sensor or flat panel display are formed with different crystallinity portions (1a,1b) of a semiconductor film (1). Highly crystalline portions (1a) are formed by exposure to an energy beam (25), for example from an excimer laser, while amorphous or low-crystalline portions (1b) are masked by a masking pattern of thermally-stable absorbent or reflective inorganic material (21) on an insulating barrier layer (20). The barrier layer (20) of, for example, silicon oxide has a sufficient thickness (t.sub.b) to mask the amorphous or low-crystallinity film portions (1b) from heating effects in the inorganic material, such as for example heat diffusion and/or impurity diffusion from the inorganic material (21).

Abstract: An amplifying circuit includes a low gain amplifier having positive and negative inputs and an output. A high impedance path provided by, for example, a low gain unity buffer amplifier feeds from the negative input to the output of the amplifier a first voltage (KV.sup.+) equal to a second voltage (V.sup.+) at the positive input of the amplifier multiplied by the reciprocal of the open loop gain (A.sub.OL) of the amplifier. This circuit simulates a unity gain buffer amplifier having a high input impedance and a high open loop gain using a low open loop gain amplifier and a feed forward arrangement. The use of a low gain amplifier avoids the need for large area transistors and the resultant large parasitic capacitances and so facilitates high speed operation.

Abstract: Each imaging element (2a) of an array (2) includes a photosensitive element (3) for sensing light incident on the imaging element (2a) and for storing charge representing the incident light and a rectifying element (D1). The imaging elements (2a) are arranged in rows and columns with each photosensitive element (3) and the associated rectifying element (D1) being coupled in series between an associated first conductor (4) and an associated second conductor (5, 6) for allowing charge stored at a selected imaging element (2a) to be read out by applying voltages to the second conductors (5, 6) to forward bias the rectifying element (D1) of the selected imaging element to cause a current representing the charge stored at the photosensitive element (3) of the selected imaging (2a) element to flow through the associated first conductor (4).

Abstract: The charge storage elements (3) of an array (2) are arranged in columns and rows and each column is coupled to an associated column conductor (4). Each storage element (3) in a row is coupled to an associated second conductor by a first rectifying element (D1) and to an associated third conductor by a second rectifying element (D2). Each row shares its second and third conductors (5a, 5b, 6a, 6b) with any adjacent rows. One of the two conductors of each row forms a row conductor (5a, 5b) and the other (6a, 6b) one of first and second reference conductors (6a and 6b). Adjacent row conductors (5a, 5b) are separated by a reference conductor (6a or 6b). Each first reference conductor (6a) is separated from any other first reference conductor (6a) by two row conductors (5a, 5b) and a second reference conductor (6b).

Abstract: The storage elements (3) of an array (2) are arranged in rows and columns with the storage elements (3) in a column being coupled to a first conductor (4) and the storage elements (3) in a row being coupled to a second (5) and to a third (6) conductor. Each storage element (3) in a row is coupled to the associated second conductor (5) by a first rectifying element (D1) and to the associated third conductor (6) by a second rectifying element (D2) with the first and second rectifying elements (D1 and D2) allowing the passage of current when forward-biased by applied voltages. The third conductors (6) also form the second conductors (5) of any adjacent rows. The first and second rectifying elements (D1' and D2') of alternate rows (N, N+2, N+4, . . . ) are oppositely oriented to those (D1" and D2") in the remaining rows (N+1, N+3, . . . ).