Abstract: A data processing system in which any one of a plurality of different or similar interface circuit cards can be located into any one of a number of slots of the data processing system without preassignment. The system includes a master processor which communicates with the interface cards through a data bus, address bus and control bus. Each interface card includes decoding means which computes during an initialization sequence a random address which will be used to decode the address bus after the initialization sequence. Once the different cards have their specific addresses, the system can reassign a new address according to the identifier register and the nature of the card thereby allowing the application programs to address each card separately and irrespective of the prior random address. This system may be used in small computers like the personal computer which are not designed with any slot identifier device.

Abstract: In a data communication system, a device for performing a wrap test on at least one line without affecting the other lines that transmit and receive data over at least one multiplex link (4) within time slots allocated to a given line within a given frame. During each time slot, a wrap control bit (W) is set by the communication system to a state that indicates either the wrap test mode or the normal mode of operation. Said bit controls a logic circuit (51) to cause data to be sent either over line (4) or to the receive circuit to perform the test, within each time slot.