Abstract: The integrated circuit comprises an inductor made at a metallization level of the circuit and a buried layer situated in the substrate of the integrated circuit under the said inductor, and connection means linking the inductor to the buried layer. The connection means are configured in such a way as to ensure the same potential in terms of dynamic response between the inductor and the buried layer. This equipotential is ensured by a transistor in a follower type arrangement made in the substrate and connected in parallel with the stray capacitances under the inductor.

Abstract: The electronic component comprises, topologically integrated within the same semiconductor structure (1), a first semiconductor area (12, 13, 3, 4, 20) capable of forming an insulated-gate field-effect transistor, and a second semiconductor area (12, 20, 18, 19, 11) capable of forming a lateral bipolar transistor, the two areas having a common semiconductor layer (20) in which the channel of the field-effect transistor is capable of being formed and/or the base current of the bipolar transistor is capable of flowing, the two areas being capable together of forming a structure capable of negative dynamic resistance.

Abstract: The semiconductor electronic component comprises, within a semiconductor substrate (3), a first active region (2,4) having a first type of conductivity (n, n.sup.++), and a second active region (10), having a second type of conductivity (p, p.sup.++), opposite that of the first type, located between the first active region (2) and the upper face (5) of the substrate. A projecting region (6), containing a third active region (7, 8) having the first type of conductivity (n.sup.+, n.sup.++) and surmounting a first part (10a) of the second active region, is provided on the upper face of the substrate. Metallizations (13, 14, 15) are respectively located in contact with the three active regions (4, 10e, 7). The second active region includes a depletable semiconductor zone (Z) extending outside the first part (10a) of the second active region, and between the first active region (2) and the upper face (5) of the substrate.

Abstract: A reference voltage generator comprising two MOS-type transistors T.sub.1 ' and T.sub.2 ' produced on the same substrate, the channels of these transistors having the respective lengths L.sub.1 and L.sub.2 and the respective widths Z.sub.1 and Z.sub.2, one of the transistors T.sub.2 ' having a channel, only one dimension of which is of the same order of magnitude as the corresponding dimension of the extension, relative to the source and drain of this transistor, of the space charge zone appearing round this source and this drain when the transistor is operating, the other dimension being large in relation to the corresponding dimension of said extension of the space charge zone, the other transistor T.sub.

Abstract: The charge-coupled device comprises at least one transfer electrode connected to a control line for transmitting a transfer signal. The circuit for measuring the charge stored in the device comprises a resistor inserted in the control line and a circuit for integrating the voltage appearing at the terminals of the resistor during application of the transfer signal.

Abstract: The fabrication of a charge-coupled device consists in forming an insulating layer in the form of a periodic series of insulating steps, in depositing a metallic layer on alternate steps so as to form electrodes, in implanting regions doped with a type opposite to the substrate into the surface of the semiconductor by directing an ion beam through the insulating steps of small thickness which are transparent to the beam, and in connecting each electrode to a control line.

Abstract: Asymmetrical potential wells are created in surface zones of a first doped semiconductor forming a substrate and are of greater depth at the downstream end than at the upstream end in order to ensure unidirectional transfer of the minority carriers. Regions localized at one extremity of the surface zones and constituting the potential wells are formed by a second semiconductor having a forbidden band width which is different from that of the first semiconductor.

Abstract: The fabrication of a charge-coupled device consists in forming an insulating layer in the form of a periodic series of insulating steps, in depositing a metallic layer on alternate steps so as to form electrodes, in implanting regions doped with a type opposite to the substrate into the surface of the semiconductor by directing an ion beam through the insulating steps of small thickness which are transparent to the beam, and in connecting each electrode to a control line.

Abstract: A negative-feedback band-pass amplifier constructed in accordance with the MOS technology comprises an input stage of the summing amplifier type constituted by two MOS transistors having sources connected to each other and to ground and drains connected to each other. The gate of one transistor constitutes the amplifier input and the gate of the other transistor is connected to the amplifier output through the negative feedback resistance. An amplifying chain whose input is coupled with the common drain connection of the input stage and whose output constitutes the amplifier output comprises n identical stages in series. Each stage is of the inverting amplifier type constituted by an MOS transistor mounted with a common source connected to ground and an MOS transistor mounted as a load resistance.

Abstract: A charge-coupled device in which the storage and tranfer of information in the form of charges consisting of minority carriers are carried out with only two clocks. The device comprises a doped semiconductor substrate coated with an insulating thin film carrying a linear series of conductive electrodes. A variably doped surface region of the substrate creates a potential barrier for the minority carriers upstream of a charge-storage region. The same value of potential is fixed respectively for the odd-numbered electrodes and for the even-numbered electrodes, these values being modified in cycles so as to transfer the charge from each alternate electrode to one of the adjacent electrodes.A method of fabrication of the device consists in forming an insulating film and an assembly of conductive electrodes on a semiconductor substrate and in ion implantation by means of an ion beam in order to increase the doping of the substrate beneath one edge of the electrodes.