Abstract: One example discloses a voltage converter, including: a power stage configured to generate an output voltage (Vo) and an output current (Jo) based on a switching frequency (fs); a primary control loop configured to vary the switching frequency (fs) in response to an on-time value code (Ton_code) and/or a peak output current code (iLpeak_code); and a secondary control loop configured to generate the Ton_code and/or the iLpeak_code.

Abstract: A method, power converter and controller are disclosed for controlling a power converter having a main converter connected between a first input voltage and a ground and having a main output at an output terminal, an auxiliary converter connected between a second input voltage and the ground and having an auxiliary output, an output capacitor connected between the main output terminal and a ground, and an auxiliary capacitor connected between the auxiliary output and the main output terminal; and a controller; the method comprising: operating the main converter at a first frequency, operating the auxiliary converter at a second frequency; controlling the main converter to control the voltage at the auxiliary output; and controlling the auxiliary converter to control the voltage at the main output.

Abstract: Disclosed are a controller and power converter having a main buck converter connected between a first input voltage and ground and having a main output, a bidirectional auxiliary converter connected between a second terminal and ground and having an auxiliary output connected to the main output, an output capacitor, and an auxiliary capacitor connected between the second terminal and the ground for providing a second terminal voltage at the second terminal; the controller comprising: first control circuit configured to operate the main converter at a first frequency; and second control circuit configured to operate the auxiliary converter at a higher frequency; the first control circuit being further configured to operate the main converter in dependence on the second terminal voltage; and the second control circuit being further configured to operate the auxiliary converter to control the voltage at the main output terminal.

Abstract: A method for power management for applications having duty-cycled high peak supply currents includes charging a buffer capacitor with a first current supplied by a battery, wherein the first current is limited by a current limiter. A load is supplied with a second current supplied by the buffer capacitor, wherein the second current comprises a pulsed current. The current limiter is controlled with at least one of a plurality of sensor inputs to limit a capacity degradation of the battery.

Abstract: A method for power management for applications having duty-cycled high peak supply currents includes charging a buffer capacitor with a first current supplied by a battery, wherein the first current is limited by a current limiter. A load is supplied with a second current supplied by the buffer capacitor, wherein the second current comprises a pulsed current. The current limiter is controlled with at least one of a plurality of sensor inputs to limit a capacity degradation of the battery.

Abstract: A methodology and apparatus are disclosed for providing standby power during standby mode by applying a low frequency sampling clock signal to first and second comparators which are connected to compare an output voltage generated at an external capacitor to, respectively, a first higher voltage threshold and a second lower voltage threshold, where the first comparator generates an enable signal in response to the output voltage reaching the first higher voltage threshold for use in activating one or more switched regulator circuits to pump up the output voltage at the external capacitor to exceed the first higher voltage threshold, and where the second comparator generates an undervoltage signal in response to the output voltage reaching the second lower voltage threshold for use in reactivating the main regulator to pump up the output voltage at the external capacitor to exceed the first higher voltage threshold.

Abstract: There are disclosed fault detection circuits and methods for an N-to-1 Dickson topology hybrid DC-DC power converter. A short circuit fault detection circuit comprises: first and second measuring circuits configured to measure first and second voltages, Vsw1, Vsw2, at the switching node in the first and second state; first and second calculation circuits configured to calculate first and second absolute error voltage as an absolute difference of the respective first and second voltages in one operating cycle (Vsw1[n?1], Vsw2[n?1]) and in a next subsequent operating cycle (Vsw1[n], Vsw2[n]); and first and second fault circuits configured to provide first and second fault outputs indicative of a fault in response to the respective first or second absolute error voltage exceeding a short-circuit-trip level. Open circuit fault detection circuits and methods are also disclosed.

Abstract: Disclosed are switched-mode DC-DC power converter modules, SMPC controllers, and distributed-control multiphase SMPC systems. The controller comprises: a reference clock; a synchronisation input configured to receive a first synchronisation signal; a synchronisation output configured to transmit a second synchronisation signal; a control unit configured to control the operation of the SMPC module with a phase determined by the reference clock signal or the first synchronisation signal; a delay line configured to generate the second synchronisation signal by adding a delay to the selected one of the first synchronisation signal and the reference clock signal; a fault detection terminal; a memory configured to store a datum corresponding to a number N of SMPCs in the system; and a delay calculation module configured to calculate the delay in dependence on the datum and the signal at the fault-detection terminal. Associated methods are also disclosed.

Abstract: There are disclosed fault detection circuits and methods for an N-to-1 Dickson topology hybrid DC-DC power converter. A short circuit fault detection circuit comprises: first and second measuring circuits configured to measure first and second voltages, Vsw1, Vsw2, at the switching node in the first and second state; first and second calculation circuits configured to calculate first and second absolute error voltage as an absolute difference of the respective first and second voltages in one operating cycle (Vsw1[n?1], Vsw2[n?1]) and in a next subsequent operating cycle (Vsw1[n], Vsw2[n]); and first and second fault circuits configured to provide first and second fault outputs indicative of a fault in response to the respective first or second absolute error voltage exceeding a short-circuit-trip level. Open circuit fault detection circuits and methods are also disclosed.

Abstract: Disclosed are switched-mode DC-DC power converter modules, SMPC controllers, and distributed-control multiphase SMPC systems. The controller comprises: a reference clock; a synchronisation input configured to receive a first synchronisation signal; a synchronisation output configured to transmit a second synchronisation signal; a control unit configured to control the operation of the SMPC module with a phase determined by the reference clock signal or the first synchronisation signal; a delay line configured to generate the second synchronisation signal by adding a delay to the selected one of the first synchronisation signal and the reference clock signal; a fault detection terminal; a memory configured to store a datum corresponding to a number N of SMPCs in the system; and a delay calculation module configured to calculate the delay in dependence on the datum and the signal at the fault-detection terminal. Associated methods are also disclosed.

Abstract: A switched capacitor power converter comprising: an input terminal; an output terminal; a plurality of capacitors; a plurality of switches for selectively connecting the plurality of capacitors to each other, and/or to the input terminal, and/or to the output terminal; and a controller configured to operate the plurality of switches based on an output voltage, such that one or more of the plurality capacitors are connected between the input terminal and the output terminal as either: a first-topology, to provide a first conversion ratio; or a second-topology, to provide a second conversion ratio, wherein the second conversion ratio is different to the first conversion ratio.

Abstract: A control system (100) for controlling a power consumption of an electronic device (300) is provided. The electronic device is adapted to communicate with a reader device via a wireless communication interface. The control system comprises a measuring unit (102) being adapted for measuring an actual field strength of an electromagnetic field provided by the reader device to the control system, a power delivery unit (101) being adapted for delivering power received via the electromagnetic field to the electronic device, and a control unit (103) being coupled to the measuring unit and being adapted for providing a control signal to the electronic device for controlling the consumption of the power being delivered to the electronic device, wherein the control signal is based on the actual field strength of the electromagnetic field.

Abstract: A switched capacitor power converter comprising: an input terminal; an output terminal; a plurality of capacitors; a plurality of switches for selectively connecting the plurality of capacitors to each other, and/or to the input terminal, and/or to the output terminal; and a controller configured to operate the plurality of switches based on an output voltage, such that one or more of the plurality capacitors are connected between the input terminal and the output terminal as either: a first-topology, to provide a first conversion ratio; or a second-topology, to provide a second conversion ratio, wherein the second conversion ratio is different to the first conversion ratio.

Abstract: A DC-DC power converter is described having a power converter input for receiving a supply voltage; a power converter output for outputting a converted supply voltage; a reference input for supplying a reference value; a switch capacitor power converter coupled to the power converter input and the power converter output and comprising at least one switchable capacitor controllable by at least two non-overlapping clock signals; a controller coupled to the switch capacitor power converter, and the power converter output. The controller is configured to generate at least two non-overlapping clock signals and to vary the non-overlapping time duration dependent on the voltage and/or current value of at least one of the power converter output, the reference input, and the power converter input.

Abstract: One example discloses, an apparatus for power management, having: a power input node configured to receive charge from a primary power source at a first power level; a power-converter, having an enabled state and a disabled state, and coupled to receive the charge from the power input node; an energy buffer, coupled to receive and store the charge from the power-converter, and configured to release the charge at a second power level; a power output node, coupled to receive the charge from the energy buffer, and configured to supply the charge at the second power level to a load; wherein the second power level is greater than the first power level; and wherein the power-converter switches between the enabled state and the disabled state based on whether the charge is supplied to the load.

Abstract: A DC-DC power converter is described having a power converter input for receiving a supply voltage; a power converter output for outputting a converted supply voltage; a reference input for supplying a reference value; a switch capacitor power converter coupled to the power converter input and the power converter output and comprising at least one switchable capacitor controllable by at least two non-overlapping clock signals; a controller coupled to the switch capacitor power converter, and the power converter output. The controller is configured to generate at least two non-overlapping clock signals and to vary the non-overlapping time duration dependent on the voltage and/or current value of at least one of the power converter output, the reference input, and the power converter input.

Abstract: One example discloses, an apparatus for power management, having: a power input node configured to receive charge from a primary power source at a first power level; a power-converter, having an enabled state and a disabled state, and coupled to receive the charge from the power input node; an energy buffer, coupled to receive and store the charge from the power-converter, and configured to release the charge at a second power level; a power output node, coupled to receive the charge from the energy buffer, and configured to supply the charge at the second power level to a load; wherein the second power level is greater than the first power level; and wherein the power-converter switches between the enabled state and the disabled state based on whether the charge is supplied to the load.

Abstract: A switched capacitor power converter comprising a set of at least two capacitors; an input for receiving an input voltage an output for outputting an output voltage different to the input voltage, a plurality of switches configured to arrange the set of capacitors into a plurality of different subcircuit arrangements between the input and output for converting the input voltage to the output voltage; wherein the set of capacitors is configured to adopt a first subcircuit arrangement in which the set is connected to the input, a second subcircuit arrangement different to the first subcircuit arrangement and a third subcircuit arrangement, different to the first and second arrangements, in which the set is connected to the output, the subcircuit arrangements configured such that each of the capacitors in the set acts as a floating capacitor.

Abstract: A switched capacitor power converter comprising a set of at least two capacitors; an input for receiving an input voltage an output for outputting an output voltage different to the input voltage, a plurality of switches configured to arrange the set of capacitors into a plurality of different subcircuit arrangements between the input and output for converting the input voltage to the output voltage; wherein the set of capacitors is configured to adopt a first subcircuit arrangement in which the set is connected to the input, a second subcircuit arrangement different to the first subcircuit arrangement and a third subcircuit arrangement, different to the first and second arrangements, in which the set is connected to the output, the subcircuit arrangements configured such that each of the capacitors in the set acts as a floating capacitor.

Abstract: Body biasing circuit and methods are implemented in a variety of different instances. One such instance involves placing, a first well of a first body bias island and a second well of a second body bias island in a first bias mode by controlling switches of a body bias switch circuit. The biasing is one of a reverse body bias, a nominal body bias and a forward body bias. The second well is also biased according to one of a reverse body bias, a nominal body bias and a forward body bias. In response to the bias-mode input, the first well of the first body bias island and the second well of the second body bias island are each placed in a second bias mode by controlling switches of the body bias switch circuit. The bias of the first well and second well can be changed.