Patents by Inventor Gerardo Escobar Valderrama

Gerardo Escobar Valderrama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220385076
    Abstract: A first direct-current to direct-current (DC-to-DC) converter is configured to convert an input direct-current voltage to an output direct-current voltage with a regulated charging current consistent with a target charging current limit or range established by the current estimator for the charging mode and respective cell identifier(s) determined by a cell balancing module for the charging mode for the time interval. A first controller is capable of controlling the charging, individually or collectively, of each of the battery cells by adjusting/controlling the regulated charging current outputted by the first DC-DC converter and/or the duty cycle of switches of the first DC-to-DC converter based on the target charging current limit or range for the time interval.
    Type: Application
    Filed: December 16, 2021
    Publication date: December 1, 2022
    Applicant: Deere & Company
    Inventors: Abraham Alberto Martinez Barron, Ricardo Schacht Rodriguez, Gerardo Escobar Valderrama
  • Patent number: 7720623
    Abstract: The present invention relates to a system to implement a phase-locked loop (PLL) which is able to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of a three-phase signal. These sequences are provided in fixed reference frame coordinates.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: May 18, 2010
    Assignee: Instituto Potosino de Investigacion Cientifica y Tecnologica (IPICYT)
    Inventors: Gerardo Escobar Valderrama, Raymundo Enrique Torres Olguin, Misael Fransisco Martinez Montejano
  • Patent number: 7710082
    Abstract: The present invention comprises a controller for the cascade H-bridge three-phase multilevel converter used as a shunt active filter. Based on the proposed mathematical model, the controller is designed to compensate harmonic distortion and reactive power due to a nonlinear distorting load. Simultaneously, the controller guarantees regulation and balance of all capacitor voltages. The idea behind the controller is to allow distortion of the current reference during the transients to guarantee regulation and balance of the capacitors voltages. The controller provides the duty ratios for each H-bridge of the cascade multilevel converter.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: May 4, 2010
    Assignee: Instituto Potosino De Investigacion Cientifica y Technologica (IPICYT)
    Inventors: Gerardo Escobar Valderrama, Misael Fransisco Martinez Montejano, Andres Alejandro Valdez Fernandez, Raymundo Enrique Torres Olguin
  • Publication number: 20090102436
    Abstract: The present invention comprises a controller for the cascade H-bridge three-phase multilevel converter used as a shunt active filter. Based on the proposed mathematical model, the controller is designed to compensate harmonic distortion and reactive power due to a nonlinear distorting load. Simultaneously, the controller guarantees regulation and balance of all capacitor voltages. The idea behind the controller is to allow distortion of the current reference during the transients to guarantee regulation and balance of the capacitors voltages. The controller provides the duty ratios for each H-bridge of the cascade multilevel converter.
    Type: Application
    Filed: October 18, 2007
    Publication date: April 23, 2009
    Inventors: Gerardo Escobar Valderrama, Misael Fransisco Martinez Montejano, Andres Alejandro Valdez Fernandez, Raymundo Enrique Torres Olguin
  • Publication number: 20090105979
    Abstract: The present invention is an algorithm to implement a phase-locked loop (PLL) which is able to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of a three-phase signal. These sequences are provided in fixed reference frame coordinates, and thus the proposed algorithm is referred as fixed reference frame PLL (FRF-PLL). In fact, the FRF-PLL does not require transformation of variables into the synchronous reference frame coordinates as in most PLL schemes. The detection of the positive sequence component of the source voltage at fundamental frequency is essential for the control and synchronization of systems coupled with the electric network, which are required to run even under grid disturbances such as unbalanced voltages, voltages sags, harmonic distortion and angular frequency variations.
    Type: Application
    Filed: October 23, 2007
    Publication date: April 23, 2009
    Inventors: Gerardo Escobar Valderrama, Raymundo Enrique Torres Olguin, Misael Fransisco Martinez Montejano
  • Publication number: 20080167735
    Abstract: A repetitive controller scheme with two feedbacks one negative and one positive plus a negative feedforward introduces infinitely many poles on the imaginary axis located at j(6l±1)?o (l=0,1,2, . . . ,?) which produces resonant peaks tuned at 6l±1 (l=0,1,2, . . . ,?) multiples of the fundamental frequency ?o. The feedforward introduces zeros, which produce notches located at 3l?o (l=0,1,2, . . . ,?), that is, in between two consecutive resonance peaks. The latter has the advantage of making the controllers more selective, in the sense that the original overlapping (appearing at the valleys) or interaction between consecutive resonant peaks is removed by the notches. This would allow, in principle, peaks of higher gains and slightly wider bandwidth, avoiding, at the same time, the excitation of harmonics located in between two consecutive peaks. The proposed compensator composed of a negative and a positive feedback plus feedforward is especially useful when only the compensation of 6l±1 (l=0,1,2, . . .
    Type: Application
    Filed: January 8, 2007
    Publication date: July 10, 2008
    Inventors: Gerardo Escobar Valderrama, Perla G. Hernandez Briones, Panfilo R. Martinez Rodriguez, Romeo Ortega Martinez