Patents by Inventor Gerardus Everardus Antonius Maria Van De Ven

Gerardus Everardus Antonius Maria Van De Ven has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6630399
    Abstract: A method of manufacturing a semiconductor device (2) on a substrate (1), the semiconductor device including an active area (5, 6, 16) in the substrate (1) demarcated by spacers (10-13,20-23) and arranged so as to contact an interconnect (29) including TiSi2; the method includes: depositing an oxide layer (26) on the substrate (1); depositing and patterning a resist layer (27) on the oxide (26); reactive ion etching of the oxide (26) to demarcate the active area (5, 6, 16), using the patterned resist layer (27); removing the resist (27) by a dry strip plasma containing at least oxygen; depositing titanium (28) on the oxide (26) and the active area (5, 6, 16); forming the interconnect (29) as self-aligned TiSi2 by a first anneal, a selective wet etch, and a second anneal; the dry strip plasma including, as a second gaseous constituent, at least fluoride.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: October 7, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Gerardus Everardus Antonius Maria Van De Ven, Michael John Ben Bolt
  • Publication number: 20020197861
    Abstract: A method of manufacturing a semiconductor device (2) on a substrate (1), said semiconductor device comprising an active area (5, 6, 16) in the substrate (1) demarcated by spacers (10-13, 20-23) and arranged so as to contact an interconnect (29) including TiSi2; the method including:
    Type: Application
    Filed: April 23, 2002
    Publication date: December 26, 2002
    Inventors: Gerardus Everardus Antonius Maria Van De Ven, Michael John Ben Bolt