Patents by Inventor Geraud J.-M. Dubois

Geraud J.-M. Dubois has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11174412
    Abstract: Disclosed is a method for mechanically anchoring polymers on the surface of a porous substrate by trapping polymer chains within the pores of the substrate under capillary forces. Surface modification of the porous substrate is achieved by anchoring one end of the polymer chains within the pores while one or more other ends of the polymer chains dangle from the surface of the porous substrate. The method provides a unique way of modifying the surface of a material without chemical reactions or precursor-substrate interactions.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: November 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Geraud J.M. Dubois, Krystelle Lionti, Teddie P. Magbitang, Willi Volksen
  • Publication number: 20190322891
    Abstract: Disclosed is a method for mechanically anchoring polymers on the surface of a porous substrate by trapping polymer chains within the pores of the substrate under capillary forces. Surface modification of the porous substrate is achieved by anchoring one end of the polymer chains within the pores while one or more other ends of the polymer chains dangle from the surface of the porous substrate. The method provides a unique way of modifying the surface of a material without chemical reactions or precursor-substrate interactions.
    Type: Application
    Filed: June 14, 2019
    Publication date: October 24, 2019
    Inventors: Geraud J.M. Dubois, Krystelle Lionti, Teddie P. Magbitang, Willi Volksen
  • Patent number: 10370556
    Abstract: Disclosed is a method for mechanically anchoring polymers on the surface of a porous substrate by trapping polymer chains within the pores of the substrate under capillary forces. Surface modification of the porous substrate is achieved by anchoring one end of the polymer chains within the pores while one or more other ends of the polymer chains dangle from the surface of the porous substrate. The method provides a unique way of modifying the surface of a material without chemical reactions or precursor-substrate interactions.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: August 6, 2019
    Assignee: International Business Machines Corporation
    Inventors: Geraud J. M. Dubois, Krystelle Lionti, Teddie P. Magbitang, Willi Volksen
  • Publication number: 20180163076
    Abstract: Disclosed is a method for mechanically anchoring polymers on the surface of a porous substrate by trapping polymer chains within the pores of the substrate under capillary forces. Surface modification of the porous substrate is achieved by anchoring one end of the polymer chains within the pores while one or more other ends of the polymer chains dangle from the surface of the porous substrate. The method provides a unique way of modifying the surface of a material without chemical reactions or precursor-substrate interactions.
    Type: Application
    Filed: December 12, 2016
    Publication date: June 14, 2018
    Applicant: International Business Machines Corporation
    Inventors: Geraud J.M. Dubois, Krystelle Lionti, Teddie P. Magbitang, Willi Volksen
  • Patent number: 8841770
    Abstract: An interconnect structure and method for fabricating the interconnect structure having enhanced performance and reliability, by minimizing oxygen intrusion into a seed layer and an electroplated copper layer of the interconnect structure, are disclosed. At least one opening in a dielectric layer is formed. A sacrificial oxidation layer disposed on the dielectric layer is formed. The sacrificial oxidation layer minimizes oxygen intrusion into the seed layer and the electroplated copper layer of the interconnect structure. A barrier metal layer disposed on the sacrificial oxidation layer is formed. A seed layer disposed on the barrier metal layer is formed. An electroplated copper layer disposed on the seed layer is formed. A planarized surface is formed, wherein a portion of the sacrificial oxidation layer, the barrier metal layer, the seed layer, and the electroplated copper layer are removed. In addition, a capping layer disposed on the planarized surface is formed.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: September 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Cyril Cabral, Jr., Geraud J. M. Dubois, Daniel C. Edelstein, Takeshi Nogami, Daniel P. Sanders
  • Publication number: 20140070418
    Abstract: An interconnect structure and method for fabricating the interconnect structure having enhanced performance and reliability, by minimizing oxygen intrusion into a seed layer and an electroplated copper layer of the interconnect structure, are disclosed. At least one opening in a dielectric layer is formed. A sacrificial oxidation layer disposed on the dielectric layer is formed. The sacrificial oxidation layer minimizes oxygen intrusion into the seed layer and the electroplated copper layer of the interconnect structure. A barrier metal layer disposed on the sacrificial oxidation layer is formed. A seed layer disposed on the barrier metal layer is formed. An electroplated copper layer disposed on the seed layer is formed. A planarized surface is formed, wherein a portion of the sacrificial oxidation layer, the barrier metal layer, the seed layer, and the electroplated copper layer are removed. In addition, a capping layer disposed on the planarized surface is formed.
    Type: Application
    Filed: November 14, 2013
    Publication date: March 13, 2014
    Applicant: International Business Machines Corporation
    Inventors: Cyril Cabral, JR., Geraud J.M. Dubois, Daniel C. Edelstein, Takeshi Nogami, Daniel P. Sanders
  • Publication number: 20130056874
    Abstract: A semiconductor device is accepted at a stage of its fabrication, at which stage the device includes a diffusion-barrier cap-material (DBCM) layer and an intermetal dielectric layer covering the DBCM layer. The DBCM layer is exposed and it is suitable for removal by an etching procedure in a portion of a pattern contained in the intermetal dielectric layer. A silylation treatment is performed on the semiconductor device prior to the etching procedure for removing the DBCM layer. The intermetal dielectric layer of the completed device has surfaces in contact with metal interconnects and metal vias, and it may have an excess of carbon content near at least a portion of the these surfaces.
    Type: Application
    Filed: September 6, 2011
    Publication date: March 7, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Maxime Darnon, Geraud J.-M. Dubois, Sebastian U. Engelmann, Teddie P. Magbitang, Sampath Purushothaman, Muthumanickam Sankarapandian, Willi Volksen