Abstract: A system and method for Cartesian modulation achieved via generation of a three-level pulse width modulated signal. The system in overview comprises two binary pulse width modulated signal generators receiving signals related to the in-phase and quadrature components of a base-band signal and a combination and amplification stage that combines the signals provided by the two binary pulse width modulated signal generators. The binary pulse width modulated signal generators contain at least one signal comparator and at least one base-band pre-distortion element. The signals related to the in-phase and quadrature components of the base-band signal may be; the positive or negative parts of the in-phase component, the positive or negative parts of the quadrature component, the absolute value or sign of the in-phase component, or the absolute value or sign of the quadrature component. These signals may be distorted by a base-band pre-distortion element before being coupled to the comparators.

Abstract: The present invention relates to a circuit arrangement and method of applying predistortion to a baseband signal used for modulating a pulse-shaped signal, wherein an envelope information of the baseband signal is detected and slewing distortions of the pulse-shaped signal are reduced by applying at least one of a phase modulation and a duty cycle 5 modulation to the baseband signal as additional predistortion in response to the detected envelope information. Thereby, slewing distortions in the pulse-shaped signal are removed or at least reduced.

Abstract: An improved differential inverter comprising a differential inverter having a differential input for receiving a first input signal and a second input signal, said inverter further comprising a differential control input for receiving a first control signal and a second control signal. The improved differential inverter further comprises a differential output for transmitting a first output signal and a second output signal. The improved differential inverter further comprises a controlled bias generator that generates the second vector of input signals in response to a bias control signal. The control bias signal is generated at an output of a voltage divider coupled to the differential output of the differential inverter said bias control signal being indicative for a DC voltage of the of the differential output.

Abstract: A receiver (10) is arranged to simultaneously receive at least a first (S1) radio frequency signal having a first frequency band (1) and a second radio frequency signal (S3) having a second frequency band (3) that is at least partly overlapping the first frequency band (1). The receiver has frequency down-conversion means (32,33) for frequency down converting the at least first (S1) and second radio frequency signals (S3) to at least a first (S2) and a second (S4) lower frequency signal and multiplexing means (34) for sequentially multiplexing the at least first (S2) and second lower frequency signals (S4) into a frequency multiplexed signal (S5).

Abstract: The efficiency of photo diodes is according to a basic idea improved by using them upside-down through letting the light (20) enter via the substrate layer (1), and by using the surface layer (3) as a mirror. Then, the epitaxial layer (2) has an approximately doubled chance to convert photons to electron-hole-pairs: either during a first pass when coming from the substrate layer (1) or during a second pass after being reflected at the surface layer (3). The surface layer (3) comprises metal stripes (6,7,8) and metal mirrors (9,10) and comprises metal areas (15,16) coupled to solders bumps (4,5) for precisely mounting said photo detector on a flexible printed-circuit board. The epitaxial layer (2) and areas (17,18,19) in the epitaxial layer (2) form electrodes of a first diode, and the epitaxial layer (2) and the substrate layer (1) form electrodes of a second diode which approximately doubles said efficiency again when adding the photocurrents of both diodes.

Abstract: Optical disk systems comprising photo detectors (1) for detecting optical disks comprising amplifiers and slicers (2-5) and delay-difference detectors (6) for detecting delay differences in sliced amplified detection signals are improved by installing delaylineless delay-difference detectors (6) comprising combinatorial-logic circuits (7,8) like inverters, ORs, NORs, ANDs, NANDs and sequential-logic circuits (11-18) like SetResetFlipFlops. Without the prior art delay lines, said delay-difference detectors (6) are of a lower complexity and low costly and can be well integrated. By introducing a first pair of sequential-logic circuits (11,12,15,16) for detecting delay differences between rising edges and a second pair of sequential-logic circuits (13,14,17,18) for detecting delay differences between falling edges, both kinds of edges are being used and the influence of time-jitter is less compared to the situation where just one kind of edge is used.

Abstract: An electronic circuit is provided which can autonomously handle an input current (Ii) having a relatively wide dynamic range without being overdriven. The electronic circuit comprises an amplifier stage (AMPST) having an input (IP) for receiving the input current (Ii) and an output (OP) for supplying an output current (Io), such that, during operation, the strength of the output current (Io) increases in response to an increasing strength of the input current (Ii) as long as the strength of the input current (Ii) has not exceeded an input reference level. The strength of the output current (Io) is kept approximately constant when the strength of the input current (Ii) has exceeded the input reference level but has not exceeded a further input reference level. The strength of the output current (Io) decreases in response to an increasing strength of the input current (Ii) when the strength of the input current (Ii) has exceeded the further input reference level.

Abstract: Optical disk systems comprising photo detectors (1) with variable gain amplifiers (10) and slicers (11) are provided with generators (12) in feedback paths between slicer (11) and amplifier (10) for controlling said amplifier (10) non-linearly. As a result, time constants of the control loop of said amplifier (10) which depend upon the level of the input signals are now compensated and the timing behavior of the control loop of said amplifier (10) has got a more continuous character. Said generator (12) comprises a converter (13) and is of low complexity and easy to integrate on a photo detector integrated-circuit together with said amplifier (10) and slicer (11) followed by a differential time delay detector (6). Said generator (12) comprises a further converter (14) with a capacitor (15) forming an integrator for making the mean value of the output voltage signal of said slicer (11) equal to zero.

Abstract: The optical signal receiving unit (10), which receives and processes an optical signal, can be programmed by the optical signal. The optical signal is detected by an optical sensor (20) and processed by a signal processor (40). The signal processor (40) has an operating mode, which is set by a programmable control unit (30). The control unit (30) is programmable by a program signal derived from the optical signal. In one embodiment the optical signal receiving unit (10) can be switched between two operating modes by a program switch signal provided at a program switch terminal (53). The apparatus (100) for reproducing information from an optical data carrier (101) comprises an optical signal receiving unit (10) according to the invention.

Abstract: An improved differential inverter comprising a differential inverter having a differential input for receiving a first input signal and a second input signal, said inverter further comprising a differential control input for receiving a first control signal and a second control signal. The improved differential inverter further comprises a differential output for transmitting a first output signal and a second output signal. The improved differential inverter further comprises a controlled bias generator that generates the second vector of input signals in response to a bias control signal. The control bias signal is generated at an output of a voltage divider coupled to the differential output of the differential inverter said bias control signal being indicative for a DC voltage of the of the differential output.

Abstract: A current mirror circuit is described which includes a current input terminal (14A), a current output terminal (14B) and a common terminal (14C). A first controllable semiconductor element (T1) is arranged between the current input terminal (14A) and the common terminal (14C). A second controllable semiconductor element (T2) is arranged between the current output terminal (14B) and the common terminal (14C). The controllable semiconductor elements (T1, T2) havie interconnected control electrodes (T1A, T2A) which are also coupled to a bias voltage source (VBIAS), for biasing said control electrodes at a reference voltage. The circuit further includes a transconductance stage (12) with an input (12A) coupled to the current input terminal (14A) and an output (12B) coupled to the common terminal (14C). The control electrodes (T1A, T2A) are coupled to the common terminal (14C) via a third controllable semiconductor element (T3).