Patents by Inventor Gerben W. De Jong

Gerben W. De Jong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8680929
    Abstract: The present invention relates to a circuit arrangement (300) for generating non-overlapping and immune-to-1/f-noise signals as has been described. A break-before-make (BBM) circuit ensures that the differential I/Q signals (LO—0, LO—90, LO—180, LO—270), driving the transistors (M11, M12, M21, M22) of mixers (16A, 16B) in an RF receiver (200), are non-over-lapping for having at any time only one of these transistors turned on. The duty cycle of each driving signal is measured, and the difference (?) in the duty cycle corresponding to two subsequent LO phases is determined through a respective differential amplifier (38A-38D). Each differential amplifier is configured to have a current output (LT—0, LT—90, LT—180, LT—270), which is then fed back to the input of the input buffer (30A-30D) corresponding to the first LO phase in order to adjust its logic threshold (LT) level and make the difference (?) equal to zero.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: March 25, 2014
    Assignee: ST-Ericsson S.A.
    Inventors: Gerben W. De Jong, Dennis Jeurissen
  • Patent number: 7999587
    Abstract: The present invention relates to a circuit arrangement and method of applying predistortion to a baseband signal used for modulating a pulse-shaped signal, wherein an envelope information of the baseband signal is detected and slewing distortions of the pulse-shaped signal are reduced by applying at least one of a phase modulation and a duty cycle 5 modulation to the baseband signal as additional predistortion in response to the detected envelope information. Thereby, slewing distortions in the pulse-shaped signal are removed or at least reduced.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: August 16, 2011
    Assignee: ST-Ericsson SA
    Inventors: Jan S. Vromans, Jan C. A. Dekkers, Gerben W. De Jong
  • Publication number: 20110164666
    Abstract: The present invention relates to a circuit arrangement (300) for generating non-overlapping and immune-to-1/f-noise signals as has been described. A break-before-make (BBM) circuit ensures that the differential I/Q signals (LO—0, LO—90, LO—180, LO—270), driving the transistors (M11, M12, M21, M22) of mixers (16A, 16B) in an RF receiver (200), are non-over-lapping for having at any time only one of these transistors turned on. The duty cycle of each driving signal is measured, and the difference (?) in the duty cycle corresponding to two subsequent LO phases is determined through a respective differential amplifier (38A-38D). Each differential amplifier is configured to have a current output (LT—0, LT—90, LT—180, LT—270), which is then fed back to the input of the input buffer (30A-30D) corresponding to the first LO phase in order to adjust its logic threshold (LT) level and make the difference (?) equal to zero.
    Type: Application
    Filed: May 21, 2009
    Publication date: July 7, 2011
    Inventors: Gerben W. De Jong, Dennis Jeurissen
  • Patent number: 7898352
    Abstract: The present invention relates in general to transferring the envelope information of a polar modulated signal to a varying pulsewidth signal, while the phase modulation is direct transferred to the phase modulation of this PWM signal. Accordingly, the resultant signal is a PWM-PPM-signal. Such a signal can efficiently amplified by use of switching amplifying stages. By the present invention four pre-distorted baseband signals are applied basically to 4 linear RF mixers and a two adders, which are, the only needed external RF building blocks to build the modulator according to the invention. That is, the basic idea of the invention resides in the way of modulation of the four baseband signals and the way of combining of the RF modulated signals.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: March 1, 2011
    Assignee: NXP B.V.
    Inventors: Jan Vromans, Gerben W. De Jong, Mihai A. T. Sanduleanu
  • Publication number: 20100253412
    Abstract: An electronic device comprising a passive harmonic-rejection mixer. The passive harmonic rejection mixer has an input connected to several sub-mixer stages, and the sub-mixer stages are connected to a summing module for generating the output. Each sub-mixing stage comprises a gating module and a respective amplifier, the gating module adapted to selectively pass the input signal or the input signal with inverted polarity under the control of control signals.
    Type: Application
    Filed: October 29, 2008
    Publication date: October 7, 2010
    Applicant: NXP B.V.
    Inventors: Johannes H.A. Brekelmans, Gerben W. De Jong, Rachid El Waffaoui, Dennis Jeurissen, Jan Van Sinderen, Simon WK Lee
  • Publication number: 20100231314
    Abstract: The present invention relates in general to transferring the envelope information of a polar modulated signal to a varying pulsewidth signal, while the phase modulation is direct transferred to the phase modulation of this PWM signal. Accordingly, the resultant signal is a PWM-PPM-signal. Such a signal can efficiently amplified by use of switching amplifying stages. By the present invention four pre-distorted baseband signals are applied basically to 4 linear RF mixers and a two adders, which are, the only needed external RF building blocks to build the modulator according to the invention. That is, the basic idea of the invention resides in the way of modulation of the four baseband signals and the way of combining of the RF modulated signals.
    Type: Application
    Filed: March 26, 2007
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventors: Jan Vromans, Gerben W. De Jong, Mihai A. T. Sanduleanu
  • Publication number: 20100156502
    Abstract: A signal processor includes a frequency converter of the multiphase type. A first phase mixer (SWC1, TIS1) has a pair of switches (M11, M12). A second phase mixer (SWC2, TIS2) also has a pair of switches (M21, M22). The pair of switches of the first phase mixer and the pair of switches of the second phase mixer have a joint common switch node (CN1). A local oscillator generates an individual mixer driver signal (MD1+, MD1?, MDQ+, MDQ?) for each switch (M11, M12, M21, M22) in the aforementioned pairs. Each individual mixer driver signal comprises periodically occurring pulses, which are phase shifted with respect to the periodically occurring pulses in the other individual mixer driver signals. Preferably, there is substantially no overlap between the periodically occurring pulses in the individual mixer driver signals.
    Type: Application
    Filed: August 8, 2007
    Publication date: June 24, 2010
    Inventors: Paulus T.M. Van Zeijl, Gerben W. de Jong
  • Publication number: 20090021320
    Abstract: A system and method for Cartesian modulation achieved via generation of a three-level pulse width modulated signal. The system in overview comprises two binary pulse width modulated signal generators receiving signals related to the in-phase and quadrature components of a base-band signal and a combination and amplification stage that combines the signals provided by the two binary pulse width modulated signal generators. The binary pulse width modulated signal generators contain at least one signal comparator and at least one base-band pre-distortion element. The signals related to the in-phase and quadrature components of the base-band signal may be; the positive or negative parts of the in-phase component, the positive or negative parts of the quadrature component, the absolute value or sign of the in-phase component, or the absolute value or sign of the quadrature component. These signals may be distorted by a base-band pre-distortion element before being coupled to the comparators.
    Type: Application
    Filed: January 18, 2007
    Publication date: January 22, 2009
    Applicant: NXP B.V.
    Inventors: Gerben W. De Jong, Jan Vromans
  • Publication number: 20080291974
    Abstract: A signal transmitter for generating a wideband RF signal for use in, for example, a 60 GHz wireless area network, wherein a wideband (e.g 4 GHz) baseband signal is divided into a number of sub-signals (14) that can be synthesized in parallel, thereby relaxing the requirements of the mixed-signal and RF blocks. This division can be performed either in time or frequency and one DAC (12) is used for each sub-band (12). Where frequency division multiplexing is used to divide the baseband signal into sub-bands (14) the additional advantage is afforded whereby analogue adjustment of the gain in each sub-band (14) is possible, so as to compensate for wideband frequency selective fading in the channel.
    Type: Application
    Filed: March 16, 2006
    Publication date: November 27, 2008
    Applicant: NXP B.V.
    Inventors: Manel A. Collados, Gerben W. De Jong
  • Patent number: 6324028
    Abstract: A recording apparatus for recording an information signal on a magnetic record carrier includes a write driver circuit and a magnetic write head. The write driver circuit comprises a first voltage driver and a second voltage driver. A first current driver and a second current driver are present for driving the write head. The first and second voltage driver each include a respective series circuit of an npn transistor and a bidirectional impedance element coupled between a point of constant potential and the respective outputs of the first and second voltage drivers.
    Type: Grant
    Filed: May 17, 1999
    Date of Patent: November 27, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Joao N. V. L. Ramalho, Johannes O. Voorman, Gerben W. De Jong, Luan Le, Eric Pieraerts
  • Patent number: 6225802
    Abstract: A device for measuring the resistance of an MR element which passes a bias current Imr and which derives a bias voltage. A voltage comparator CMP receives the bias voltage Vmr and a reference voltage Vref. A counter UPCNT has an enable input EN coupled to the output of the comparator and a digital output forming the output of the device. A current source supplies the bias current Imr which represents a digital value received by the current source at its control input which is coupled to the digital output of the counter. The device enables the digital value of a resistance to be measured automatically.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: May 1, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Joao N. V. L. Ramalho, Gerben W. De Jong, Jozef A. M. Ramaekers, Eric Pieraerts