Patents by Inventor Gerd Auerswald

Gerd Auerswald has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit arrangement with semiconductor elements arranged in chips
    Patent number: 6940136
    Abstract: A circuit arrangement with semiconductor elements arranged in chips is described. The circuit arrangement is characterized by at least one metal body (s1) for electrically contacting the semiconductor elements and for dissipating the heat produced by the semiconductor elements, said metal body (s1) being adapted to simultaneously function as the support for the semiconductor elements and the chips (c1) of the semiconductor elements being fastened on the body (s1).
    Type: Grant
    Filed: July 21, 2003
    Date of Patent: September 6, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventors: Gerd Auerswald, Gunter Ludwig
  • Circuit arrangement
    Patent number: 6930373
    Abstract: The circuit has a power stage (LE) with heat generating components mounted around at least one component that generates less heat mounted in an inner region. The heat generating components are connected to at least one conducting metal body (K1) that is mounted on a cooling body (KK) in electrically insulated manner to cool the components. The cooling body encloses the inner region.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: August 16, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventors: Gerd Auerswald, Kurt Gross, Michael Kirchberger, Stefan Kulig, Hans Rappl
  • Circuit arrangement
    Publication number: 20040169268
    Abstract: The circuit has a power stage (LE) with heat generating components mounted around at least one component that generates less heat mounted in an inner region. The heat generating components are connected to at least one conducting metal body (K1) that is mounted on a cooling body (KK) in electrically insulated manner to cool the components. The cooling body encloses the inner region.
    Type: Application
    Filed: August 27, 2003
    Publication date: September 2, 2004
    Inventors: Gerd Auerswald, Kurt Gross, Michael Kirchberger, Stefan Kulig, Hans Rappl
  • Circuit arrangement with semiconductor elements arranged in chips
    Publication number: 20040016985
    Abstract: A circuit arrangement with semiconductor elements arranged in chips is described. The circuit arrangement is characterized by at least one metal body (s1) for electrically contacting the semiconductor elements and for dissipating the heat produced by the semiconductor elements, said metal body (s1) being adapted to simultaneously function as the support for the semiconductor elements and the chips (c1) of the semiconductor elements being fastened on the body (s1).
    Type: Application
    Filed: July 21, 2003
    Publication date: January 29, 2004
    Inventors: Gerd Auerswald, Gunter Ludwig
  • Process for producing an automatic-machine-bondable ceramic circuit carrier, and automatic-machine-bondable ceramic circuit carrier
    Patent number: 6419980
    Abstract: A process for producing an automatic-machine-bondable LTCC (Low Temperature Cofired Ceramics) circuit carrier includes the steps of applying a conductive paste having a glass content of less than 1.0 percent by weight onto a ceramic substrate having a glass content of at least 30 percent by weight, in order to form contact pads. The circuit carrier is fired such that glass melts out of the ceramic substrate and causes an adhesion between the conductive paste and the ceramic substrate. A ceramic circuit carrier has adhesion-promoting glass between the ceramic substrate and the conductive paste, wherein the adhesion-promoting glass originates from the ceramic substrate.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: July 16, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventor: Gerd Auerswald