Abstract: An X-ray tube has at least one grid electrode arranged between an anode electrode and a cathode electrode. Via a focusing unit, an electron flow from the cathode electrode to the anode electrode is focused in that the focusing unit supplies the grid electrode with a first electric grid potential. The focusing unit is supplied with electrical energy in an electrically isolated manner via an energy converter. The first electric grid potential is provided via an adjustable voltage divider, and the adjustable voltage divider is adjusted via a control circuit of the focusing unit in that the control circuit is supplied with an electrically isolated control signal of a control unit. The control signal depends on a value for the first electric grid potential.

Abstract: A housing for a high voltage tank has a boiler which is open on one side and a circuit board cover which closes the boiler. At least one strain gauge is arranged on or in the circuit board cover such that it is expanded or compressed with a pressure-induced deformation of the circuit board cover. A housing of this type is particularly suited as a high voltage tank for an x-ray emitter. An impermissible pressure in the housing for a high voltage tank can be determined easily and reliably.

Abstract: A housing for a high voltage tank has a boiler which is open on one side and a circuit board cover which closes the boiler. At least one strain gauge is arranged on or in the circuit board cover such that it is expanded or compressed with a pressure-induced deformation of the circuit board cover. A housing of this type is particularly suited as a high voltage tank for an x-ray emitter. An impermissible pressure in the housing for a high voltage tank can be determined easily and reliably.

Abstract: A housing comprising a liquid-tight electric bushing is provided. The housing comprises an opening and a printed circuit board comprising at least first and second layers. The first layer is a top side of the printed circuit board and spans the opening. A first contact element is disposed on the top side and in a blind bore through the first layer that extends to the second layer. The second layer is a conductor track in the interior of the printed circuit board.

Abstract: This invention relates to a flexible rate matching method, comprising the steps of: a) receiving a continuous stream of data items at a prespecified rate of a clock signal in a configurable data shift register; b) storing, for each data item stored in the data shirt register, an associated indication of validity in a configurable validity shift register and shifting the indications of validity at said prespecified rate; c) modifying the contents of the data shift register and the validity shift register through puncture/repetition operations so as to achieve a rate matching, and d) outputting valid data items at said prespecified rate using said indications of validity stored in the validity shift register. The invention also relates to a corresponding flexible rate matching apparatus as well as to a computer program product and a processor program product.

Abstract: This invention relates to a method for interleaving, according to an interleaving scheme, an input sequence comprising K bits into an interleaved sequence, comprising the steps of (a) storing the input sequence in a first memory means, (b) generating first indices of N succeeding bits of the interleaved sequence, wherein 1 m(F) N m(F) K, (c) converting. according to an inverse of said interleaving scheme, said first indices into second indices indicative of the positions where said N succeeding bits of the interleaved sequence are stored in said first memory means, and (d) reading out said N succeeding bits from said positions in said first memory means, thereby generating at least part of said interleaved sequence.

Abstract: A turbo coder block having a parallelization of degree n achieves increased processing speed. Each parallelized turbo coder block includes a first storage unit to store n samples of an input signal and a second storage unit to store n samples of at least one output signal of the parallelized turbo coding block. The parallelized turbo coder block further includes a bank of n delay units and is adapted to parallel process n samples of the input signal such that two delay units of the bank directly receive subsets of the n samples of the input signal, and an output signal of one delay unit is supplied to two delay units in the parallelized turbo coder block.

Abstract: The invention relates to a parallel CRC generation circuit comprising an input register means (I), an output register means (C), a number of XOR gates (XOR1-XORN) and a coupling means (CM) that feeds predetermined ones of the output lines (C0-CN−1) of the output register means (C) and output lines (I1-In) of the input register means (I) as inputs to the respective XOR gates. According to the invention a matrix representation of the state change based on the selected CRC polynomial is set up and evaluated, such that the coupling means (CM) only uses the minimum number of feedbacks of the output lines and feed-forwards of the output lines of the input register means (I). Thus, the parallel CRC calculation circuit according to the invention has no redundancy and uses only a minimum hardware amount.

Abstract: In a telecommunication system where a plurality of user channels are processed in a time-slotted manner, a transmitter and receiver can perform bit error rate measurements for a plurality of user channels by only using one PN-generator (T-PN) and one state memory (ISM). Whenever the beginning of a new time-slot is detected, a last-stored phase state is read out from the state memory (ISM). When detecting the end of the respective time-slot, the phase state then present in the PN-generator (T-PN) is stored into the state memory (ISM) to be used for re-initialization of the PN-generator (T-PN) for the same time-slot in a succeeding frame. Thus, one PN-generator (T-PN) is enough for generating PN-sequences for a great number of user channels.