Patents by Inventor Gerd Pfeiffer
Gerd Pfeiffer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10319870Abstract: An apparatus, system, and method are disclosed for a photovoltaic module, the photovoltaic module comprising a plurality of photovoltaic cells, a controllable infrared protection layer, and a protection switching means. The controllable infrared protection layer is for reducing the infrared radiation absorbed by the photovoltaic module, where the controllable infrared protection layer has a first state and a second state. When the infrared protection layer is in the first state the transmission of infrared radiation to the photovoltaic cells is higher than when the infrared protection layer is in the second state. The protection switching means is for switching the controllable infrared protection layer between the first state and the second state.Type: GrantFiled: September 21, 2010Date of Patent: June 11, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Lawrence A. Clevenger, Timothy J. Dalton, Maxime Darnon, Rainer Krause, Gerd Pfeiffer, Kevin Prettyman, Carl J. Radens, Brian C. Sapp
-
Publication number: 20170194904Abstract: A photovoltaic module includes a plurality of photovoltaic cells and a controllable heater for heating the plurality of photovoltaic cells to a temperature of at least 90 degrees Celsius for a minimum of 10 minutes, the plurality of photovoltaic cells in a manufactured state such that the plurality of photovoltaic cells are capable of producing electricity when illuminated. In one embodiment, controllable heater includes an infrared absorber, where the infrared absorber is adapted for moving between a stored position and a deployed position, and where the infrared absorber is adapted for heating the photovoltaic module using absorbed infrared radiation when in the deployed position.Type: ApplicationFiled: March 23, 2017Publication date: July 6, 2017Inventors: Lawrence A. Clevenger, Rainer Krause, Zhengwen Li, Gerd Pfeiffer, Kevin Prettyman, Brian C. Sapp
-
Publication number: 20170194905Abstract: An apparatus for restoring efficiency of a photovoltaic cell includes an illumination module for illuminating one or more photovoltaic cells such that the one or more photovoltaic cells receive a time integrated irradiance equivalent to at least 5 hours of solar illumination. The apparatus includes an annealing module for annealing the one or more photovoltaic cells at a temperature above 90 degrees Celsius for a minimum of 10 minutes, the annealing in response to illuminating the one or more photovoltaic cells.Type: ApplicationFiled: March 23, 2017Publication date: July 6, 2017Inventors: Lawrence A. Clevenger, Rainer Krause, Zhengwen Li, Gerd Pfeiffer, Kevin Prettyman, Brian C. Sapp
-
Patent number: 9634165Abstract: An apparatus, system, and method are disclosed for restoring efficiency of a photovoltaic cell. An illumination module illuminates photovoltaic cells so the cells receive a time integrated irradiance equivalent to at least 5 hours of solar illumination. After illumination, an annealing module anneals the photovoltaic cells at a temperature above 90 degrees Celsius for a minimum of 10 minutes. In one embodiment, the illumination module illuminates the photovoltaic cells for a time integrated irradiance equivalent to at least 20 hours of solar illumination. In another embodiment, the illumination module illuminates the photovoltaic cells for a time integrated irradiance equivalent to at least 16 hours of solar illumination while being heated to at least 50 degrees Celsius. In another embodiment, a solar concentrator irradiates the photovoltaic cells in sunlight for at least 10 hours and increases the irradiance of solar illumination on the cells by a factor of 2 to 5.Type: GrantFiled: September 21, 2010Date of Patent: April 25, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Lawrence A. Clevenger, Rainer Krause, Zhengwen Li, Gerd Pfeiffer, Kevin Prettyman, Brian C. Sapp
-
Patent number: 9252133Abstract: The formation of TSVs (through substrate vias) for 3D applications has proven to be defect dependent upon the type of starting semiconductor substrate employed. In addition to the initial formation of TSVs via Bosch processing, backside 3D wafer processing has also shown a defect dependency on substrate type. High yield of TSV formation can be achieved by utilizing a substrate that embodies bulk micro defects (BMD) at a density between 1e4/cc (particles per cubic centimeter) and 1e7/cc and having equivalent diameter less than 55 nm (nanometers).Type: GrantFiled: September 16, 2014Date of Patent: February 2, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Christopher N. Collins, Mukta G. Farooq, Troy L. Graves-Abe, Joyce C. Liu, Gerd Pfeiffer, Thuy L. Tran-Quinn
-
Patent number: 9246028Abstract: A silicon solar cell is manufactured by providing a carrier plate, and by applying a first contact pattern to the carrier plate. The first contact pattern includes a set of first laminar contacts. The silicon solar cell is further manufactured by applying a multitude of silicon slices to the first contact pattern, and by applying a second contact pattern to the multitude of silicon slices. Each first laminar contact of the set of first laminar contacts is in spatial laminar contact with maximally two silicon slices. The second contact pattern includes a set of second laminar contacts. Each second laminar contact of the set of second laminar contacts is in spatial laminar contact with maximally two silicon slices.Type: GrantFiled: March 20, 2014Date of Patent: January 26, 2016Assignee: International Business Machines CorporationInventors: Rainer Klaus Krause, Gerd Pfeiffer, Hans-Juergen Eickelmann, Thorsten Muehge
-
Patent number: 9165819Abstract: According to a method herein, a first side of a substrate is implanted with a first material to change a crystalline structure of the first side of the substrate from a first crystalline state to a second crystalline state, after the first material is implanted. A second material is deposited on the first side of the substrate, after the first material is implanted. A first side of an insulator layer is bonded to the second material on the first side of the substrate. Integrated circuit devices are formed on a second side of the insulator layer, opposite the first side of the insulator layer, after the insulator layer is bonded to the second material. The integrated circuit devices are thermally annealed. The first material maintains the second crystalline state of the first side of the substrate during the annealing.Type: GrantFiled: November 18, 2014Date of Patent: October 20, 2015Assignee: GLOBALFOUNDRIES INC.Inventors: Alan B. Botula, Jeffrey E. Hanrahan, Mark D. Jaffe, Alvin J. Joseph, Dale W. Martin, Gerd Pfeiffer, James A. Slinkman
-
Publication number: 20150072504Abstract: According to a method herein, a first side of a substrate is implanted with a first material to change a crystalline structure of the first side of the substrate from a first crystalline state to a second crystalline state, after the first material is implanted. A second material is deposited on the first side of the substrate, after the first material is implanted. A first side of an insulator layer is bonded to the second material on the first side of the substrate. Integrated circuit devices are formed on a second side of the insulator layer, opposite the first side of the insulator layer, after the insulator layer is bonded to the second material. The integrated circuit devices are thermally annealed. The first material maintains the second crystalline state of the first side of the substrate during the annealing.Type: ApplicationFiled: November 18, 2014Publication date: March 12, 2015Inventors: Alan B. Botula, Jeffrey E. Hanrahan, Mark D. Jaffe, Alvin J. Joseph, Dale W. Martin, Gerd Pfeiffer, James A. Slinkman
-
Patent number: 8951896Abstract: According to a method herein, a first side of a substrate is implanted with a first material to change a crystalline structure of the first side of the substrate from a first crystalline state to a second crystalline state, after the first material is implanted. A second material is deposited on the first side of the substrate, after the first material is implanted. A first side of an insulator layer is bonded to the second material on the first side of the substrate. Integrated circuit devices are formed on a second side of the insulator layer, opposite the first side of the insulator layer, after the insulator layer is bonded to the second material. The integrated circuit devices are thermally annealed. The first material maintains the second crystalline state of the first side of the substrate during the annealing.Type: GrantFiled: June 28, 2013Date of Patent: February 10, 2015Assignee: International Business Machines CorporationInventors: Alan B. Botula, Jeffrey E. Hanrahan, Mark D. Jaffe, Alvin J. Joseph, Dale W. Martin, Gerd Pfeiffer, James A. Slinkman
-
Publication number: 20150004749Abstract: The formation of TSVs (through substrate vias) for 3D applications has proven to be defect dependent upon the type of starting semiconductor substrate employed. In addition to the initial formation of TSVs via Bosch processing, backside 3D wafer processing has also shown a defect dependency on substrate type. High yield of TSV formation can be achieved by utilizing a substrate that embodies bulk micro defects (BMD) at a density between 1e4/cc (particles per cubic centimeter) and 1e7/cc and having equivalent diameter less than 55 nm (nanometers).Type: ApplicationFiled: September 16, 2014Publication date: January 1, 2015Inventors: Christopher N. Collins, Mukta G. Farooq, Troy L. Graves-Abe, Joyce C. Liu, Gerd Pfeiffer, Thuy L. Tran-Quinn
-
Publication number: 20150004778Abstract: According to a method herein, a first side of a substrate is implanted with a first material to change a crystalline structure of the first side of the substrate from a first crystalline state to a second crystalline state, after the first material is implanted. A second material is deposited on the first side of the substrate, after the first material is implanted. A first side of an insulator layer is bonded to the second material on the first side of the substrate. Integrated circuit devices are formed on a second side of the insulator layer, opposite the first side of the insulator layer, after the insulator layer is bonded to the second material. The integrated circuit devices are thermally annealed. The first material maintains the second crystalline state of the first side of the substrate during the annealing.Type: ApplicationFiled: June 28, 2013Publication date: January 1, 2015Inventors: ALAN B. BOTULA, Jeffrey E. Hanrahan, Mark D. Jaffe, Alvin J. Joseph, Dale W. Martin, Gerd Pfeiffer, James A. Slinkman
-
Patent number: 8907494Abstract: The formation of TSVs (through substrate vias) for 3D applications has proven to be defect dependent upon the type of starting semiconductor substrate employed. In addition to the initial formation of TSVs via Bosch processing, backside 3D wafer processing has also shown a defect dependency on substrate type. High yield of TSV formation can be achieved by utilizing a substrate that embodies bulk micro defects (BMD) at a density between 1e4/cc (particles per cubic centimeter) and 1e7/cc and having equivalent diameter less than 55 nm (nanometers).Type: GrantFiled: March 14, 2013Date of Patent: December 9, 2014Assignee: International Business Machines CorporationInventors: Christopher N. Collins, Mukta G. Farooq, Troy L. Graves-Abe, Joyce C. Liu, Gerd Pfeiffer, Thuy L. Tran-Quinn
-
Publication number: 20140264756Abstract: The formation of TSVs (through substrate vias) for 3D applications has proven to be defect dependent upon the type of starting semiconductor substrate employed. In addition to the initial formation of TSVs via Bosch processing, backside 3D wafer processing has also shown a defect dependency on substrate type. High yield of TSV formation can be achieved by utilizing a substrate that embodies bulk micro defects (BMD) at a density between 1e4/cc (particles per cubic centimeter) and 1e7/cc and having equivalent diameter less than 55 nm (nanometers).Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: International Business Machines CorporationInventors: Christopher N. Collins, Mukta G. Farooq, Troy L. Graves-Abe, Joyce C. Liu, Gerd Pfeiffer, Thuy L. Tran-Quinn
-
Publication number: 20140202529Abstract: A silicon solar cell is manufactured by providing a carrier plate, and by applying a first contact pattern to the carrier plate. The first contact pattern includes a set of first laminar contacts. The silicon solar cell is further manufactured by applying a multitude of silicon slices to the first contact pattern, and by applying a second contact pattern to the multitude of silicon slices. Each first laminar contact of the set of first laminar contacts is in spatial laminar contact with maximally two silicon slices. The second contact pattern includes a set of second laminar contacts. Each second laminar contact of the set of second laminar contacts is in spatial laminar contact with maximally two silicon slices.Type: ApplicationFiled: March 20, 2014Publication date: July 24, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Rainer Klaus Krause, Gerd Pfeiffer, Hans-Juergen Eickelmann, Thorsten Muehge
-
Patent number: 8772079Abstract: A method of backside contacting of thin layer photovoltaic cells having Si elements as well as thin film cells, like CIGS, is provided, including the following steps: providing a p-n-junction including a thin n-doped Si layer and a thin p-doped Si layer bonded on top of said n-doped Si layer; bonding said p-n-junction to a glass substrate; preparing contact points on said structured thin p-doped Si layer and said thin n-doped Si layer; and creating contact pins on said structured thin p-doped Si layer and said thin n-doped Si layer.Type: GrantFiled: April 8, 2008Date of Patent: July 8, 2014Assignee: International Business Machines CorporationInventors: Rainer Krause, Gerd Pfeiffer, Thorsten Muehge, Hans-Juergen Eickelmann, Michael Haag, Markus Schmidt
-
Patent number: 8735212Abstract: A silicon solar cell is manufactured by providing a carrier plate, and by applying a first contact pattern to the carrier plate. The first contact pattern includes a set of first laminar contacts. The silicon solar cell is further manufactured by applying a multitude of silicon slices to the first contact pattern, and by applying a second contact pattern to the multitude of silicon slices. Each first laminar contact of the set of first laminar contacts is in spatial laminar contact with maximally two silicon slices. The second contact pattern includes a set of second laminar contacts. Each second laminar contact of the set of second laminar contacts is in spatial laminar contact with maximally two silicon slices.Type: GrantFiled: January 13, 2009Date of Patent: May 27, 2014Assignee: International Business Machines CorporationInventors: Rainer Klaus Krause, Gerd Pfeiffer, Hans-Juergen Eickelmann, Thorsten Muehge
-
Patent number: 8679863Abstract: Methods are provided for fine tuning substrate resistivity. The method includes measuring a resistivity of a substrate after an annealing process, and fine tuning a subsequent annealing process to achieve a target resistivity of the substrate. The fine tuning is based on the measured resistivity.Type: GrantFiled: March 15, 2012Date of Patent: March 25, 2014Assignee: International Business Machines CorporationInventors: Jeffrey P. Gambino, Derrick Liu, Dale W. Martin, Gerd Pfeiffer
-
Patent number: 8665575Abstract: A photovoltaic module (10) with a plurality of solar cells (20) interconnected in serial and/or parallel arrangement within the module (10) is equipped with an overheat protection system (30) for suppressing damages of the photovoltaic module (10) due to defects of the solar cells (20). The overheat protection system (30) comprises a heat sensor (32) which is thermally coupled to a solar cell (20). The heat sensor (32) is physically integrated into an electrical switch (34, 36, 38) which is electrically connected to said solar cell (20).Type: GrantFiled: June 23, 2011Date of Patent: March 4, 2014Assignee: International Business Machines CorporationInventors: Lawrence A. Clevenger, Harold J. Hovel, Rainer Krause, Zhengwen Li, Kevin S. Petrarca, Gerd Pfeiffer, Kevin Prettyman, Carl J. Radens, Brian C. Sapp
-
Patent number: 8637958Abstract: A structure and method for forming isolation and a buried plate for a trench capacitor is disclosed. Embodiments of the structure comprise an epitaxial layer serving as the buried plate, and a bounded deep trench isolation area serving to isolate one or more deep trench structures. Embodiments of the method comprise angular implanting of the deep trench isolation area to form a P region at the base of the deep trench isolation area that serves as an anti-punch through implant.Type: GrantFiled: September 14, 2012Date of Patent: January 28, 2014Assignee: International Business Machines CorporationInventors: Abhishek Dube, Subramanian S. Iyer, Babar Ali Khan, Oh-jung Kwon, Junedong Lee, Paul C. Parries, Chengwen Pei, Gerd Pfeiffer, Ravi Todi, Geng Wang
-
Patent number: 8614115Abstract: A method for manufacturing a photovoltaic solar cell device includes the following. A p-n junction having a first doping density is formed. Formation of the p-n junction is enhanced by introducing a second doping density to form high doped areas for a dual emitter application. The high doped areas are defined by a masking process integrated with the formation of the p-n junction, resulting in a mask pattern of the high doped areas. A metallization of the high doped areas occurs in accordance with the mask pattern of the high doped areas.Type: GrantFiled: October 29, 2010Date of Patent: December 24, 2013Assignee: International Business Machines CorporationInventors: Lawrence A. Clevenger, Harold J. Hovel, Rainer Klaus Krause, Kevin S. Petrarca, Gerd Pfeiffer, Kevin M. Prettyman, Carl Radens, Brian C. Sapp