Patents by Inventor Gerhard Fettweis

Gerhard Fettweis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8774161
    Abstract: A communication method for a mobile communication system is described. Available radio resources, i.e. an available frequency band, are divided into a plurality of comparatively small radio resource units. The mobile communication system uses a first communication protocol for communicating with mobile stations compatible with the mobile communication system. For communicating with an autonomous terminal at least one radio resource unit is allocated, in which a second communication protocol incompatible with the first communication protocol is used for communicating with the terminal.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: July 8, 2014
    Assignee: Vodafone Holding GmbH
    Inventors: Gerhard Fettweis, Peter Rost, Walter Nitzold
  • Publication number: 20140040700
    Abstract: In a multicore type error correction processing system which can simultaneously cope with a plurality of error correction methods and a plurality of code lengths, an interconnect part 11 has a barrel shifter which extends across a plurality of error correction processing parts 12a-12c. An error correction process can be selectively performed by collectively using a group of the plurality of the error correction processing parts 12a-12c or by individually using each of individual error correction processing parts 12a-12c in response to interconnection configuration information. With this structure, the plurality of the error correction processing parts 12a-12c are collectively used if computation resources are insufficient and an idling error correction processing part is assigned to another error correction process if computation resources are excessive.
    Type: Application
    Filed: October 4, 2011
    Publication date: February 6, 2014
    Inventors: Tomoyoshi Kobori, Steffen Kunze, Emil Matus, Gerhard Fettweis
  • Publication number: 20130137486
    Abstract: In a cellular communication system a first and a second set of antennas are arranged at an antenna site. First and second baseband processing blocks are coupled to the antennas of the first and second antennas respectively. To improve the connection to a terminal an antenna of the second set is coupled to the first baseband processing block in addition to the antennas of the first set. Communication with the terminal is performed via at least one antenna of the first and at least one antenna of the second set. The first and second set of antennas can belong to two different network operators. By applying this invention, the two network operators can share the antenna pool of the first and second set of antennas even if the antennas are the existing ones at the same top-roof or tower.
    Type: Application
    Filed: July 27, 2012
    Publication date: May 30, 2013
    Applicant: Vodafone Holding GmbH
    Inventors: Ines Riedel, Gerhard Fettweis, Ralf Irmer, Zhanhong Lu, Prakash Bhat
  • Patent number: 8428171
    Abstract: A method is provided for planning and optimizing the configuration of a radio access network which comprises base stations and receivers and employs a mobile radio technology that allows and/or enforces use of multi-antenna types at said base stations and receivers. By a ray tracing algorithm which is performed between said transmitter positions and said receiver positions using a 3D clutter height matrix, a scalar metric is determined for each receiver position which directly reflects a capacity gain resulting from applying a multi-antenna type instead of a single antenna at said transmitter and receiver positions. This scalar metric allows in an algorithmically advantageous way to analyze the relative performance of different MIMO antenna types in a potential deployment area and to select and deploy an optimal MIMO antenna type for a particular coverage sector.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: April 23, 2013
    Assignee: Actix GmbH
    Inventors: Gerhard Fettweis, Jens Voigt, Joerg Schueler
  • Publication number: 20130064163
    Abstract: A radio communication system comprises an access station that is adapted and configured to transmit a rateless encoded multicast message to a plurality of radio terminals. Each of the radio terminals transmits a reply message to the access station upon successful reception of the multicast message, wherein the transmit resources are selected from a predefined set of agreed transmit resources, where the selection is influenced by certain characteristics of the reception of the multicast message.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 14, 2013
    Applicant: VODAFONE HOLDING GMBH
    Inventors: Gerhard Fettweis, Walter Nitzold, Stefan Krone, Trevor Gill
  • Publication number: 20130034037
    Abstract: A radio communication method and a corresponding system are described. Time frequency resources are divided into a grid of resources. For communicating with a plurality of non-synchronized terminals the timing offset of each terminal is measured and a joint message is asynchronously transmitted to a subset of terminals, wherein the subset comprises at least two terminals.
    Type: Application
    Filed: August 2, 2012
    Publication date: February 7, 2013
    Applicant: VODAFONE HOLDING GMBH
    Inventors: Stefan Krone, Gerhard Fettweis, Walter Nitzold
  • Publication number: 20120002644
    Abstract: A communication method for a mobile communication system is described. Available radio resources, i.e. an available frequency band, are divided into a plurality of comparatively small radio resource units. The mobile communication system uses a first communication protocol for communicating with mobile stations compatible with the mobile communication system. For communicating with an autonomous terminal at least one radio resource unit is allocated, in which a second communication protocol incompatible with the first communication protocol is used for communicating with the terminal.
    Type: Application
    Filed: July 1, 2011
    Publication date: January 5, 2012
    Applicant: Vodafone Holding GmbH
    Inventors: Gerhard Fettweis, Peter Rost, Walter Nitzold
  • Publication number: 20100296556
    Abstract: A method and a corresponding system for estimating and refining channel tap values for use in an equalizer on the receiver side, wherein the method is based on exploiting statistics of logic strings that multilevel codes impose on a transmitted signal.
    Type: Application
    Filed: December 12, 2008
    Publication date: November 25, 2010
    Applicant: Vodafone Holding GmbH
    Inventors: Wolfgang Rave, Andre Fonseca Dos Santos, Gerhard Fettweis
  • Publication number: 20100232529
    Abstract: A method is provided for planning and optimizing the configuration of a radio access network which comprises base stations and receivers and employs a mobile radio technology that allows and/or enforces use of multi-antenna types at said base stations and receivers. By a ray tracing algorithm which is performed between said transmitter positions and said receiver positions using a 3D clutter height matrix, a scalar metric is determined for each receiver position which directly reflects a capacity gain resulting from applying a multi-antenna type instead of a single antenna at said transmitter and receiver positions. This scalar metric allows in an algorithmically advantageous way to analyze the relative performance of different MIMO antenna types in a potential deployment area and to select and deploy an optimal MIMO antenna type for a particular coverage sector.
    Type: Application
    Filed: March 16, 2010
    Publication date: September 16, 2010
    Applicant: ACTIX GMBH
    Inventors: Gerhard FETTWEIS, Jens VOIGT, Joerg SCHUELER
  • Publication number: 20100189132
    Abstract: A general frequency division multiplex (GFDM) transmission system is proposed. Vacant frequency ranges are detected and subsequently used for transmission, wherein a single carrier transmission system with cyclic prefixing is deployed. A corresponding transmitter and receiver are disclosed.
    Type: Application
    Filed: December 17, 2009
    Publication date: July 29, 2010
    Inventors: Gerhard Fettweis, Marco Krondorf, Steffen Bittner
  • Patent number: 7647445
    Abstract: A processor bus has several data processing units, each connected to a line system which acts as a bus having bus segments connected in a separable manner through connection units. Functional units arranged on the bus carry out the information thereof. The functional units may carry out exchanges independently of each other. Conversely, functional units in different groups may carry out information exchanges simultaneously. The connection units define combinatory connections of the signal lines, with physical connections between the connection units provided by the bus segments. The connection units can carry out information exchanges with as many connected functional units as desired. The information path from a functional unit to selected functional units can be multiplexed or switched by toggling simultaneous connections to several functional units or by bridging non-participating functional units.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: January 12, 2010
    Assignee: NXP B.V.
    Inventors: Wolfram Drescher, Gerhard Fettweis
  • Patent number: 7069418
    Abstract: The invention relates to a method and an arrangement for instruction word generation in the controlling of functional units in a processor, the instruction words comprising a plurality of instruction word parts. In this case, in a program sequence, under the control of a program word, an instruction word is taken from a row—determined by a reading row number—of an instruction word memory that can be written to row by row, the said instruction word is altered by means of substitution of an instruction word part by the information part of the respective program word and is written back to a row of the instruction word memory, the said row being determined by a writing row number. Afterwards, an instruction word—which is generated in this way and is to be executed in accordance with the program—for controlling the functional units is output to the processor.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: June 27, 2006
    Assignee: Systemonic AG
    Inventors: Matthias Weiss, Gerhard Fettweis
  • Publication number: 20050216640
    Abstract: A processor bus arrangement including several data processing units, each connected to a line system specified as a bus. The bus includes connection units and bus segments, where the bus segments are connected to the bus in a seperable manner through the connection units. This guarantees that the functional units, arranged on the bus, carry out the information thereof, by means of the bus and may carry out an exchange independently of other functional units. Furthermore, other functional units in different groups may carry out an information exchange simultaneously, by means of the bus. As the connection units perform the function of the defined combinatory connection of the signal lines, the bus segments generate the physical connections between the connection units. This ensures that the connection units carry out the information exchange with as many connected functional units as required.
    Type: Application
    Filed: September 21, 2001
    Publication date: September 29, 2005
    Inventors: Wolfram Drescher, Gerhard Fettweis
  • Patent number: 6728739
    Abstract: A data calculating device preferably used to improve the calculation precision when fixed-point calculation is performed by block-floating-point system. Each piece of data of a data group is calculated, the minimum scale factor representative of the calculated data is detected as a group scale factor (GSF), and calculated data is subjected to scaling based on the detected GSFs. These processing are applied to each data group of a data block. The minimum GSF out of the detected GSFs is detected as a block scale factor (BSF). When calculation of the calculated data is performed again, the calculated data of the data group is subjected to scaling according to the GSFs and BSF before the calculation performed again.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: April 27, 2004
    Assignees: Asahi Kasei Kabushiki Kaisha, Systemonic AG
    Inventors: Shiro Kobayashi, Gerhard Fettweis
  • Publication number: 20040044818
    Abstract: The invention relates to an arrangement for the configuration of data paths, in which different functional units are connected to a linker unit and arranged within a CPU architecture. The aim of the invention is to permit functional extensions within the CPU architecture without essentially extending the networking complexity between the functional units and the controlling register of the CPU. Said aim is achieved, whereby the linking unit essentially comprises a processor bus arrangement and functional units with dedicated input registers and output registers.
    Type: Application
    Filed: September 10, 2003
    Publication date: March 4, 2004
    Inventors: Wolfram Drescher, Gerhard Fettweis
  • Patent number: 6618800
    Abstract: A procedure and a processor arrangement for parallel data processing in which data are read out from a data memory and are conveyed via a communications unit to processing units for parallel processing. The data are divided into data groups with several elements and are stored in a group memory under a common address. To each data group, a processing unit is allocated, in that at least one element of a data group can be directly linked to the allocated processing unit, directly bypassing the communications unit. In a parallel fashion, a data group is read out from the data memory and is distributed over one or several processing units and is processed in a parallel fashion in the latter.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: September 9, 2003
    Assignee: Systemonic AG
    Inventors: Matthias Weiss, Gerhard Fettweis
  • Publication number: 20030159127
    Abstract: The invention relates to a method and an apparatus for generating instruction words to trigger functional units in a processor, where a sequence of data-stationary commands occurs, deriving from a sequence of primary instruction words. Here the primary instruction words consist of several instruction word parts. The instruction word parts are each intended to trigger one functional unit.
    Type: Application
    Filed: December 27, 2000
    Publication date: August 21, 2003
    Inventors: Matthias Weiss, Gerhard Fettweis
  • Publication number: 20020194454
    Abstract: The invention relates to a method and an arrangement for instruction word generation in the driving of functional units in a processor, the instruction words comprising a plurality of instruction word parts. In this case, in a program sequence, under the control of a program word, an instruction word is taken from a row—determined by a reading row number—of an instruction word memory that can be written to row by row, the said instruction word is altered by means of substitution of an instruction word part by the information part of the respective program word and is written back to a row of the instruction word memory, the said row being determined by a writing row number. Afterwards, an instruction word—which is generated in this way and is to be executed in accordance with the program—for driving the functional units is output to the processor.
    Type: Application
    Filed: February 14, 2002
    Publication date: December 19, 2002
    Inventors: Matthias Weiss, Gerhard Fettweis
  • Patent number: 6212202
    Abstract: A broadband data transmission method in a wireless cellular network, the data to be transmitted being transmitted as packet-oriented data, preferably by means of ATM cells. An additional narrow-band signaling channel transmits signaling information necessary for managing the cellular, wireless network.
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: April 3, 2001
    Assignee: Robert Bosch GmbH
    Inventors: Markus Radimirsch, Gerhard Fettweis, Joerg Kuehne, Branimir Stantchev
  • Patent number: 5978822
    Abstract: A circuit having a single branch, which is controllable to implement either a left or right shift of bits of a data word. Preferably, the circuit is controllable to implement any selected one of the following operations: a left or right shift of bits of the word; and rotation (to the left or right) of bits of the word. In a preferred implementation, the circuit includes a set of multiplexer stages and circuitry for selectively inverting the order of the bits of the word input to, and the word output from, the set of multiplexer stages. Each of the multiplexer stages shifts the bits of the word it receives either by zero bits (in response to a first control signal), or by a positive number of bits (in response to a second control signal). By selectively controlling various subsets of the multiplexer stages, the bits of the input word can be shifted by any of a number of places (from zero to N, where N is some positive number).
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: November 2, 1999
    Assignee: Atmel Corporation
    Inventors: Jumana A. Muwafi, Gerhard Fettweis, Howard W. Neff