Abstract: A system for detecting tampering with a product includes a capacitor in or attached to the product, an integrated circuit configured to inject a current the capacitor and to detect a corresponding voltage slope on the capacitor. The integrated circuit is further configured to divide the voltage slope into a plurality of slope segments, discard a first set of slope segments, whose slope value falls outside a predefined range of slope values, and use a second set of slope segments, whose slope value falls within said predefined range, for determining a capacitance on the capacitor. A corresponding method for detecting tampering with a product is conceived, and a corresponding computer program is provided.

Abstract: An electric circuit for generating a pulse width modulated output signal is provided. The electric circuit includes at least one power supply signal input and a first circuitry configured to generate and output an intermediate signal based on the power supply signal input. Further, the electric circuit includes a second circuitry configured to generate the pulse width modulated output signal based on the intermediate signal. The second circuitry includes an energy storage element and a charging/discharging circuitry configured to charge and discharge the energy storage element using the intermediate signal to modify an energy state of the energy storage element. The second circuitry is configured to generate the pulse width modulated output signal based on the energy state of the energy storage element.

Abstract: A system for detecting tampering with a product includes a capacitor in or attached to the product, an integrated circuit configured to inject a current the capacitor and to detect a corresponding voltage slope on the capacitor. The integrated circuit is further configured to divide the voltage slope into a plurality of slope segments, discard a first set of slope segments, whose slope value falls outside a predefined range of slope values, and use a second set of slope segments, whose slope value falls within said predefined range, for determining a capacitance on the capacitor. A corresponding method for detecting tampering with a product is conceived, and a corresponding computer program is provided.

Abstract: A reference voltage generator circuit (100) is disclosed, comprising a first transistor (101) having a first channel type and a second transistor (102) having a second channel type. A current source (104) is connected to a source terminal of the first transistor (101). A drain terminal of the second transistor (102) is connected to a drain terminal of the first transistor (101). The reference voltage generator circuit (100) further comprises a third transistor (103) having the second channel type, wherein a drain terminal of the third transistor (103) is connected to a source terminal of the second transistor (102). A node between the source terminal of the second transistor (102) and the drain terminal of the third transistor (103) is connected to a gate terminal of the first transistor (101). A connection for a reference voltage (Vrc) is provided between the current source (104) and the source terminal of the first transistor (101).

Abstract: According to a first aspect of the present disclosure, an electronic tamper detection device is provided, comprising a radio frequency antenna, a tamper loop, a power level determination unit and a tamper measurement unit, wherein: the power level determination unit is configured to determine a power level of the tamper detection device; the tamper measurement unit is configured to generate a measurement signal and to transmit said measurement signal through the tamper loop; the tamper measurement unit is further configured to adapt the measurement signal in dependence on the power level. According to a second aspect of the present disclosure, a corresponding tamper detection method is conceived. According to a third aspect of the present disclosure, a corresponding non-transitory computer-readable storage medium comprising instructions is provided.

Abstract: A reference voltage generator circuit (100) is disclosed, comprising a first transistor (101) having a first channel type and a second transistor (102) having a second channel type. A current source (104) is connected to a source terminal of the first transistor (101). A drain terminal of the second transistor (102) is connected to a drain terminal of the first transistor (101). The reference voltage generator circuit (100) further comprises a third transistor (103) having the second channel type, wherein a drain terminal of the third transistor (103) is connected to a source terminal of the second transistor (102). A node between the source terminal of the second transistor (102) and the drain terminal of the third transistor (103) is connected to a gate terminal of the first transistor (101). A connection for a reference voltage (Vrc) is provided between the current source (104) and the source terminal of the first transistor (101).

Abstract: According to a first aspect of the present disclosure, an electronic tamper detection device is provided, comprising a radio frequency antenna, a tamper loop, a power level determination unit and a tamper measurement unit, wherein: the power level determination unit is configured to determine a power level of the tamper detection device; the tamper measurement unit is configured to generate a measurement signal and to transmit said measurement signal through the tamper loop; the tamper measurement unit is further configured to adapt the measurement signal in dependence on the power level. According to a second aspect of the present disclosure, a corresponding tamper detection method is conceived. According to a third aspect of the present disclosure, a corresponding non-transitory computer-readable storage medium comprising instructions is provided.