Patents by Inventor Gerhard Meijer
Gerhard Meijer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070274125Abstract: A nonvolatile memory cell includes a bipolar programmable storage element operative to store a logic state of the memory cell, and a metal-oxide-semiconductor device including first and second source/drains and a gate. A first terminal of the bipolar programmable storage element is adapted for connection to a first bit line. The first source/drain is connected to a second terminal of the bipolar programmable storage element, the second source/drain is adapted for connection to a second bit line, and the gate is adapted for connection to a word line.Type: ApplicationFiled: August 15, 2007Publication date: November 29, 2007Applicant: International Business Machines CorporationInventors: Johannes Bednorz, John DeBrosse, Chung Lam, Gerhard Meijer, Jonathan Sun
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Publication number: 20070247893Abstract: A nonvolatile memory array includes a plurality of word lines, a plurality of bit lines, a plurality of source lines, and a plurality of nonvolatile memory cells. Each of at least a subset of the plurality of memory cells has a first terminal connected to one of the plurality of word lines, a second terminal connected to one of the plurality of bit lines, and a third terminal connected to one of the plurality of source lines. At least one of the memory cells includes a bipolar programmable storage element operative to store a logic state of the memory cell, a first terminal of the bipolar programmable storage element connecting to one of a corresponding first one of the bit lines and a corresponding first one of the source lines, and a metal-oxide-semiconductor device including first and second source/drains and a gate.Type: ApplicationFiled: April 21, 2006Publication date: October 25, 2007Applicant: International Business Machines CorporationInventors: Johannes Bednorz, Chung Lam, Gerhard Meijer
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Publication number: 20070235811Abstract: Disclosed are a semiconductor structure and a method that allow for simultaneous voltage/current conditioning of multiple memory elements in a nonvolatile memory device with multiple memory cells. The structure and method incorporate the use of a resistor connected in series with the memory elements to limit current passing through the memory elements. Specifically, the method and structure incorporate a blanket temporary series resistor on the wafer surface above the memory cells and/or permanent series resistors within the memory cells. During the conditioning process, these resistors protect the transition metal oxide in the individual memory elements from damage (i.e., burn-out), once it has been conditioned.Type: ApplicationFiled: April 7, 2006Publication date: October 11, 2007Applicant: International Business Machines CorporationInventors: Toshijaru Furukawa, Mark Hakey, Steven Holmes, David Horak, Charles Koburger, Chung Lam, Gerhard Meijer
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Publication number: 20070212810Abstract: Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.Type: ApplicationFiled: May 15, 2007Publication date: September 13, 2007Inventors: Toshijaru Furukawa, Mark Hakey, Steven Holmes, David Horak, Charles Koburger, Chung Lam, Gerhard Meijer
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Publication number: 20070187829Abstract: A memory cell for use in integrated circuits comprises a chalcogenide feature and a transition metal oxide feature. Both the chalcogenide feature and transition metal oxide feature each have at least two stable electrical resistance states. At least two bits of data can be concurrently stored in the memory cell by placing the chalcogenide feature into one of its stable electrical resistance states and by placing the transition metal oxide feature into one of its stable electrical resistance states.Type: ApplicationFiled: February 14, 2006Publication date: August 16, 2007Applicant: International Business Machines CorporationInventors: Chung Lam, Gerhard Meijer, Alejandro Schrott
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Publication number: 20060289908Abstract: A field effect device includes a source electrode, a drain electrode, a channel formed between the source electrode and the drain electrode, and a gate electrode formed directly on the channel and arranged in a gap between the source electrode and the drain electrode. The channel includes a switching material that is reversibly switchable between a lower conductivity state and a higher conductivity state. The first conductivity state has an electrical conductivity which is lower than an electrical conductivity of the second conductivity state. Each of the conductivity states is persistent without the need for a sustaining excitation signal including an electrical field, heat and/or light applied to the device.Type: ApplicationFiled: August 31, 2006Publication date: December 28, 2006Applicant: International Business Machines CorporationInventors: Georg Bednorz, David Gundlach, Siegfried Karg, Gerhard Meijer, Heike Riel, Walter Riess
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Publication number: 20060267086Abstract: Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.Type: ApplicationFiled: May 31, 2005Publication date: November 30, 2006Applicant: International Business Machines CorporationInventors: Toshijaru Furukawa, Mark Hakey, Steven Holmes, David Horak, Charles Koburger, Chung Lam, Gerhard Meijer
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Publication number: 20060256611Abstract: A nonvolatile memory cell includes a bipolar programmable storage element operative to store a logic state of the memory cell, and a metal-oxide-semiconductor device including first and second source/drains and a gate. A first terminal of the bipolar programmable storage element is adapted for connection to a first bit line. The first source/drain is connected to a second terminal of the bipolar programmable storage element, the second source/drain is adapted for connection to a second bit line, and the gate is adapted for connection to a word line.Type: ApplicationFiled: August 31, 2005Publication date: November 16, 2006Applicant: International Business Machines CorporationInventors: Johannes Bednorz, John DeBrosse, Chung Lam, Gerhard Meijer, Jonathan Sun
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Publication number: 20060071272Abstract: A memory element comprises a first number of electrodes and a second number of electrically conducting channels between sub-groups of two of said electrodes, the channels exhibiting an electrical resistance that is reversibly switchable between different states, wherein the first number is larger than two and the second number is larger than the first number divided by two. The electrically conducting channels may be provided in transition metal oxide material, which exhibits a reversibly switchable resistance that is attributed to a switching phenomenon at the interfaces between the electrodes and the transition metal oxide material.Type: ApplicationFiled: September 29, 2005Publication date: April 6, 2006Applicant: International Business Machines CorporationInventors: Santos Alvarado, Johannes Bednorz, Gerhard Meijer
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Publication number: 20060027893Abstract: Provides a field-enhanced programmable resistance memory cell. In an example embodiment, a resistor includes a resistance structure between a first electrode and a second electrode. The resistance structure includes an insulating dielectric material. The second electrode includes a protrusion extending into the resistance structure. The insulating dielectric material includes a material in which a confined conductive region with a programmable resistance is formable via a conditioning signal.Type: ApplicationFiled: July 7, 2005Publication date: February 9, 2006Applicant: International Business Machines CorporationInventors: Gerhard Meijer, Chung Lam, Hon-Sum Wong
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Publication number: 20050260839Abstract: Processes, apparatus and systems for depositing a switching material that is switchable between conductivity states and where the states are persistent. The invention further relates to a microelectronic device or non-volatile resistance switching memory comprising the switching material for storing digital information. A process includes a step of depositing the switching material by a CMOS deposition technique at a temperature lower than 400° C.Type: ApplicationFiled: April 14, 2005Publication date: November 24, 2005Applicant: International Business Machines CorporationInventors: Rolf Allenspach, Johannes Bednorz, Gerhard Meijer, Chung Lam, Richard Stutz, Daniel Widmer
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Publication number: 20050111256Abstract: A device (2) with a switchable capacitance comprises a first and a second electrode (12, 20) facing each other, a dielectric layer (14) between a first and a second capacitor electrode (12, 20), and a switching member (18) between the second electrode (20) and the dielectric layer (14), the switching member (18) comprising a switching material reversibly switchable between a lower conductivity state and a higher conductivity state, each of the lower conductivity state and the higher conductivity state being persistent, wherein the capacitance of the device (2) depends on the conductivity state of the switching material.Type: ApplicationFiled: November 10, 2004Publication date: May 26, 2005Applicant: International Business Machine CorporationInventors: Georg Bednorz, David Gundlach, Gerhard Meijer, Walter Riess
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Publication number: 20050111252Abstract: A field effect device (2) comprises a source electrode (14), a drain electrode (16), a channel (24) formed between the source electrode (14) and the drain electrode (16), and a gate electrode (22) separated from the channel (24) by an insulating layer (20), wherein the channel (24) comprises a switching material reversibly switchable between a lower conductivity state and a higher conductivity state, each of the conductivity states being persistent.Type: ApplicationFiled: November 12, 2004Publication date: May 26, 2005Applicant: International Business Machines CorporationInventors: Georg Bednorz, David Gundlach, Siegfried Karg, Gerhard Meijer, Heike Riel, Walter Riess